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sunxi: H616: add DRAM type selection
Allwinner H616 SoC supports several types of DRAM memory. To further integrate other types of memory, we need to add this delimitation. Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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4 changed files with 12 additions and 3 deletions
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@ -431,7 +431,7 @@ config ARM_BOOT_HOOK_RMR
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This allows both the SPL and the U-Boot proper to be entered in
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either mode and switch to AArch64 if needed.
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if SUNXI_DRAM_DW || DRAM_SUN50I_H6
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if SUNXI_DRAM_DW || DRAM_SUN50I_H6 || DRAM_SUN50I_H616
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config SUNXI_DRAM_DDR3
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bool
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@ -476,6 +476,14 @@ config SUNXI_DRAM_H6_DDR3_1333
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This option is the DDR3 timing used by the boot0 on H6 TV boxes
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which use a DDR3-1333 timing.
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config SUNXI_DRAM_H616_DDR3_1333
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bool "DDR3-1333 boot0 timings on the H616 DRAM controller"
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select SUNXI_DRAM_DDR3
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depends on DRAM_SUN50I_H616
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help
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This option is the DDR3 timing used by the boot0 on H616 TV boxes
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which use a DDR3-1333 timing.
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config SUNXI_DRAM_DDR2_V3S
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bool "DDR2 found in V3s chip"
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select SUNXI_DRAM_DDR2
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@ -3,5 +3,4 @@ obj-$(CONFIG_SUNXI_DRAM_LPDDR3_STOCK) += lpddr3_stock.o
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obj-$(CONFIG_SUNXI_DRAM_DDR2_V3S) += ddr2_v3s.o
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obj-$(CONFIG_SUNXI_DRAM_H6_LPDDR3) += h6_lpddr3.o
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obj-$(CONFIG_SUNXI_DRAM_H6_DDR3_1333) += h6_ddr3_1333.o
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# currently only DDR3 is supported on H616
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obj-$(CONFIG_MACH_SUN50I_H616) += h616_ddr3_1333.o
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obj-$(CONFIG_SUNXI_DRAM_H616_DDR3_1333) += h616_ddr3_1333.o
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@ -7,6 +7,7 @@ CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e
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CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e
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CONFIG_DRAM_SUN50I_H616_TPR10=0xf83438
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CONFIG_MACH_SUN50I_H616=y
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CONFIG_SUNXI_DRAM_H616_DDR3_1333=y
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CONFIG_R_I2C_ENABLE=y
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CONFIG_SPL_SPI_SUNXI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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@ -10,6 +10,7 @@ CONFIG_DRAM_SUN50I_H616_TPR10=0x2f0007
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CONFIG_DRAM_SUN50I_H616_TPR11=0xffffdddd
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CONFIG_DRAM_SUN50I_H616_TPR12=0xfedf7557
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CONFIG_MACH_SUN50I_H616=y
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CONFIG_SUNXI_DRAM_H616_DDR3_1333=y
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CONFIG_R_I2C_ENABLE=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_I2C=y
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