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IPQ40xx: clk: Use dt-bindings instead of hardcoding
Its common to use dt-bindings instead of hard-coding clocks or resets. So lets use the imported Linux GCC bindings on IPQ40xx target. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
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parent
ae52e75d23
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5ae15415c1
2 changed files with 5 additions and 2 deletions
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@ -10,6 +10,7 @@
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#include "skeleton.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/pinctrl-snapdragon.h>
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#include <dt-bindings/clock/qcom,ipq4019-gcc.h>
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/ {
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#address-cells = <1>;
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@ -61,7 +62,7 @@
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blsp1_uart1: serial@78af000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0x78af000 0x200>;
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clock = <&gcc 26>;
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clock = <&gcc GCC_BLSP1_UART1_APPS_CLK>;
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bit-rate = <0xFF>;
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status = "disabled";
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u-boot,dm-pre-reloc;
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@ -13,6 +13,8 @@
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#include <dm.h>
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#include <errno.h>
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#include <dt-bindings/clock/qcom,ipq4019-gcc.h>
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struct msm_clk_priv {
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phys_addr_t base;
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};
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@ -20,7 +22,7 @@ struct msm_clk_priv {
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ulong msm_set_rate(struct clk *clk, ulong rate)
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{
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switch (clk->id) {
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case 26: /*UART1*/
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case GCC_BLSP1_UART1_APPS_CLK: /*UART1*/
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/* This clock is already initialized by SBL1 */
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return 0;
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break;
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