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arm: dts: imx6ul-isiot: Add FEC node

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Add FEC node for Engicam Is.IoT MX6UL module.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Jagan Teki 2017-02-24 15:32:57 +05:30 • committed by Stefano Babic
parent e411e67e1e
commit 580a7d692b
1 changed files with 22 additions and 0 deletions
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22
arch/arm/dts/imx6ul-isiot.dtsi
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@ -56,6 +56,13 @@
}; };
}; };
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rmii";
status = "okay";
};
&i2c1 { &i2c1 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
@ -86,6 +93,21 @@
}; };
&iomuxc { &iomuxc {
pinctrl_enet1: enet1grp {
fsl,pins = <
MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO 0x1b0b0
MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x1b0b0
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp { pinctrl_i2c1: i2c1grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0