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drivers/ddr/fsl: Adjust bstopre value

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By default the bstopre value has been set to 0x100, used to be 1/4
value of refint. Modern DDR has increased the refresh time. Adjust
to 1/4 of refresh interval dynamically. Individual board can still
override this value in board ddr file, or to use auto-precharge.

Signed-off-by: York Sun <yorksun@freescale.com>
This commit is contained in:
York Sun 2015-07-23 14:04:48 -07:00
parent 14d5547cf1
commit 56848428a8
3 changed files with 8 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/ddr/fsl/main.c
View file

@ -535,7 +535,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
* which is currently STEP_ASSIGN_ADDRESSES. * which is currently STEP_ASSIGN_ADDRESSES.
*/ */
populate_memctl_options( populate_memctl_options(
timing_params[i].all_dimms_registered, &timing_params[i],
&pinfo->memctl_opts[i], &pinfo->memctl_opts[i],
pinfo->dimm_params[i], i); pinfo->dimm_params[i], i);
/* /*

10
drivers/ddr/fsl/options.c
View file

@ -499,7 +499,7 @@ static inline unsigned int auto_bank_intlv(dimm_params_t *pdimm)
return 0; return 0;
} }
unsigned int populate_memctl_options(int all_dimms_registered, unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
memctl_options_t *popts, memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num) unsigned int ctrl_num)
@ -640,7 +640,7 @@ unsigned int populate_memctl_options(int all_dimms_registered,
popts->ba_intlv_ctl = 0; popts->ba_intlv_ctl = 0;
/* Memory Organization Parameters */ /* Memory Organization Parameters */
popts->registered_dimm_en = all_dimms_registered; popts->registered_dimm_en = common_dimm->all_dimms_registered;
/* Operational Mode Paramters */ /* Operational Mode Paramters */
@ -778,9 +778,11 @@ unsigned int populate_memctl_options(int all_dimms_registered,
* Set this to 0 for global auto precharge * Set this to 0 for global auto precharge
* The value of 0x100 has been used for DDR1, DDR2, DDR3. * The value of 0x100 has been used for DDR1, DDR2, DDR3.
* It is not wrong. Any value should be OK. The performance depends on * It is not wrong. Any value should be OK. The performance depends on
* applications. There is no one good value for all. * applications. There is no one good value for all. One way to set
* is to use 1/4 of refint value.
*/ */
popts->bstopre = 0x100; popts->bstopre = picos_to_mclk(ctrl_num, common_dimm->refresh_rate_ps)
>> 2;
/* /*
* Window for four activates -- tFAW * Window for four activates -- tFAW

2
include/fsl_ddr.h
View file

@ -103,7 +103,7 @@ unsigned int compute_lowest_common_dimm_parameters(
const dimm_params_t *dimm_params, const dimm_params_t *dimm_params,
common_timing_params_t *outpdimm, common_timing_params_t *outpdimm,
unsigned int number_of_dimms); unsigned int number_of_dimms);
unsigned int populate_memctl_options(int all_dimms_registered, unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
memctl_options_t *popts, memctl_options_t *popts,
dimm_params_t *pdimm, dimm_params_t *pdimm,
unsigned int ctrl_num); unsigned int ctrl_num);