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phy: support Amlogic A1 family

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Setting G12A and A1 is similar, so we can use G12A phy
driver with little changes.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005085434.74755-6-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
Alexey Romanov 2023-10-05 11:54:26 +03:00 • committed by Neil Armstrong
parent 80f45c3b36
commit 5533c883ce
2 changed files with 66 additions and 15 deletions
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2
drivers/phy/Kconfig
View file

@ -200,7 +200,7 @@ config MESON_GXL_USB_PHY
config MESON_G12A_USB_PHY config MESON_G12A_USB_PHY
bool "Amlogic Meson G12A USB PHYs" bool "Amlogic Meson G12A USB PHYs"
depends on PHY && ARCH_MESON && MESON_G12A depends on PHY && ARCH_MESON && (MESON_G12A || MESON_A1)
imply REGMAP imply REGMAP
help help
This is the generic phy driver for the Amlogic Meson G12A This is the generic phy driver for the Amlogic Meson G12A

57
drivers/phy/meson-g12a-usb2.c
View file

@ -19,6 +19,7 @@
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/printk.h> #include <linux/printk.h>
#include <power/regulator.h> #include <power/regulator.h>
#include <power-domain.h>
#include <reset.h> #include <reset.h>
#include <clk.h> #include <clk.h>
@ -147,18 +148,28 @@
#define RESET_COMPLETE_TIME 1000 #define RESET_COMPLETE_TIME 1000
#define PLL_RESET_COMPLETE_TIME 100 #define PLL_RESET_COMPLETE_TIME 100
enum meson_soc_id {
MESON_SOC_A1,
MESON_SOC_G12A,
};
struct phy_meson_g12a_usb2_priv { struct phy_meson_g12a_usb2_priv {
struct regmap *regmap; struct regmap *regmap;
#if CONFIG_IS_ENABLED(CLK) #if CONFIG_IS_ENABLED(CLK)
struct clk clk; struct clk clk;
#endif #endif
struct reset_ctl reset; struct reset_ctl reset;
#if CONFIG_IS_ENABLED(POWER_DOMAIN)
struct power_domain pwrdm;
#endif
int soc_id;
}; };
static int phy_meson_g12a_usb2_init(struct phy *phy) static int phy_meson_g12a_usb2_init(struct phy *phy)
{ {
struct udevice *dev = phy->dev; struct udevice *dev = phy->dev;
struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev); struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev);
u32 value;
int ret; int ret;
#if CONFIG_IS_ENABLED(CLK) #if CONFIG_IS_ENABLED(CLK)
@ -197,8 +208,7 @@ static int phy_meson_g12a_usb2_init(struct phy *phy)
FIELD_PREP(PHY_CTRL_R17_MPLL_FILTER_PVT2, 2) | FIELD_PREP(PHY_CTRL_R17_MPLL_FILTER_PVT2, 2) |
FIELD_PREP(PHY_CTRL_R17_MPLL_FILTER_PVT1, 9)); FIELD_PREP(PHY_CTRL_R17_MPLL_FILTER_PVT1, 9));
regmap_write(priv->regmap, PHY_CTRL_R18, value = FIELD_PREP(PHY_CTRL_R18_MPLL_LKW_SEL, 1) |
FIELD_PREP(PHY_CTRL_R18_MPLL_LKW_SEL, 1) |
FIELD_PREP(PHY_CTRL_R18_MPLL_LK_W, 9) | FIELD_PREP(PHY_CTRL_R18_MPLL_LK_W, 9) |
FIELD_PREP(PHY_CTRL_R18_MPLL_LK_S, 0x27) | FIELD_PREP(PHY_CTRL_R18_MPLL_LK_S, 0x27) |
FIELD_PREP(PHY_CTRL_R18_MPLL_PFD_GAIN, 1) | FIELD_PREP(PHY_CTRL_R18_MPLL_PFD_GAIN, 1) |
@ -210,6 +220,11 @@ static int phy_meson_g12a_usb2_init(struct phy *phy)
FIELD_PREP(PHY_CTRL_R18_MPLL_ADJ_LDO, 1) | FIELD_PREP(PHY_CTRL_R18_MPLL_ADJ_LDO, 1) |
PHY_CTRL_R18_MPLL_ACG_RANGE; PHY_CTRL_R18_MPLL_ACG_RANGE;
if (priv->soc_id == MESON_SOC_A1)
value |= PHY_CTRL_R18_MPLL_DCO_CLK_SEL;
regmap_write(priv->regmap, PHY_CTRL_R18, value);
udelay(PLL_RESET_COMPLETE_TIME); udelay(PLL_RESET_COMPLETE_TIME);
/* UnReset PLL */ /* UnReset PLL */
@ -232,6 +247,7 @@ static int phy_meson_g12a_usb2_init(struct phy *phy)
FIELD_PREP(PHY_CTRL_R20_USB2_BGR_VREF_4_0, 0) | FIELD_PREP(PHY_CTRL_R20_USB2_BGR_VREF_4_0, 0) |
FIELD_PREP(PHY_CTRL_R20_USB2_BGR_DBG_1_0, 0)); FIELD_PREP(PHY_CTRL_R20_USB2_BGR_DBG_1_0, 0));
if (priv->soc_id == MESON_SOC_G12A)
regmap_write(priv->regmap, PHY_CTRL_R4, regmap_write(priv->regmap, PHY_CTRL_R4,
FIELD_PREP(PHY_CTRL_R4_CALIB_CODE_7_0, 0xf) | FIELD_PREP(PHY_CTRL_R4_CALIB_CODE_7_0, 0xf) |
FIELD_PREP(PHY_CTRL_R4_CALIB_CODE_15_8, 0xf) | FIELD_PREP(PHY_CTRL_R4_CALIB_CODE_15_8, 0xf) |
@ -239,6 +255,11 @@ static int phy_meson_g12a_usb2_init(struct phy *phy)
PHY_CTRL_R4_TEST_BYPASS_MODE_EN | PHY_CTRL_R4_TEST_BYPASS_MODE_EN |
FIELD_PREP(PHY_CTRL_R4_I_C2L_BIAS_TRIM_1_0, 0) | FIELD_PREP(PHY_CTRL_R4_I_C2L_BIAS_TRIM_1_0, 0) |
FIELD_PREP(PHY_CTRL_R4_I_C2L_BIAS_TRIM_3_2, 0)); FIELD_PREP(PHY_CTRL_R4_I_C2L_BIAS_TRIM_3_2, 0));
else if (priv->soc_id == MESON_SOC_A1)
regmap_write(priv->regmap, PHY_CTRL_R21,
PHY_CTRL_R21_USB2_CAL_ACK_EN |
PHY_CTRL_R21_USB2_TX_STRG_PD |
FIELD_PREP(PHY_CTRL_R21_USB2_OTG_ACA_TRIM_1_0, 2));
/* Tuning Disconnect Threshold */ /* Tuning Disconnect Threshold */
regmap_write(priv->regmap, PHY_CTRL_R3, regmap_write(priv->regmap, PHY_CTRL_R3,
@ -247,10 +268,15 @@ static int phy_meson_g12a_usb2_init(struct phy *phy)
FIELD_PREP(PHY_CTRL_R3_DISC_THRESH, 3)); FIELD_PREP(PHY_CTRL_R3_DISC_THRESH, 3));
/* Analog Settings */ /* Analog Settings */
if (priv->soc_id == MESON_SOC_G12A) {
regmap_write(priv->regmap, PHY_CTRL_R14, 0); regmap_write(priv->regmap, PHY_CTRL_R14, 0);
regmap_write(priv->regmap, PHY_CTRL_R13, regmap_write(priv->regmap, PHY_CTRL_R13,
PHY_CTRL_R13_UPDATE_PMA_SIGNALS | PHY_CTRL_R13_UPDATE_PMA_SIGNALS |
FIELD_PREP(PHY_CTRL_R13_MIN_COUNT_FOR_SYNC_DET, 7)); FIELD_PREP(PHY_CTRL_R13_MIN_COUNT_FOR_SYNC_DET, 7));
} else if (priv->soc_id == MESON_SOC_A1) {
regmap_write(priv->regmap, PHY_CTRL_R13,
FIELD_PREP(PHY_CTRL_R13_MIN_COUNT_FOR_SYNC_DET, 7));
}
return 0; return 0;
} }
@ -282,6 +308,8 @@ int meson_g12a_usb2_phy_probe(struct udevice *dev)
struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev); struct phy_meson_g12a_usb2_priv *priv = dev_get_priv(dev);
int ret; int ret;
priv->soc_id = (enum meson_soc_id)dev_get_driver_data(dev);
ret = regmap_init_mem(dev_ofnode(dev), &priv->regmap); ret = regmap_init_mem(dev_ofnode(dev), &priv->regmap);
if (ret) if (ret)
return ret; return ret;
@ -298,6 +326,22 @@ int meson_g12a_usb2_phy_probe(struct udevice *dev)
return ret; return ret;
} }
#if CONFIG_IS_ENABLED(POWER_DOMAIN)
ret = power_domain_get(dev, &priv->pwrdm);
if (ret < 0 && ret != -ENODEV) {
pr_err("failed to get power domain\n");
return ret;
}
if (ret != -ENODEV) {
ret = power_domain_on(&priv->pwrdm);
if (ret < 0) {
pr_err("failed to enable power domain\n");
return ret;
}
}
#endif
#if CONFIG_IS_ENABLED(CLK) #if CONFIG_IS_ENABLED(CLK)
ret = clk_get_by_index(dev, 0, &priv->clk); ret = clk_get_by_index(dev, 0, &priv->clk);
if (ret < 0) if (ret < 0)
@ -308,7 +352,14 @@ int meson_g12a_usb2_phy_probe(struct udevice *dev)
} }
static const struct udevice_id meson_g12a_usb2_phy_ids[] = { static const struct udevice_id meson_g12a_usb2_phy_ids[] = {
{ .compatible = "amlogic,g12a-usb2-phy" }, {
.compatible = "amlogic,g12a-usb2-phy",
.data = (ulong)MESON_SOC_G12A,
},
{
.compatible = "amlogic,a1-usb2-phy",
.data = (ulong)MESON_SOC_A1,
},
{ } { }
}; };