mirror of
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Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/
This commit is contained in:
Tom Rini
commit
5024a96db8
1155 changed files with 43011 additions and 10220 deletions
dts/upstream/Bindings
Makefile
access-controllers
arm
altera
amlogic.yamlapm
aspeed
bcm
fsl.yamlkeystone
marvell
qcom,coresight-tpda.yamlqcom.yamlrockchip.yamlstm32
sunxi.yamlata
bus
cache
clock
airoha,en7523-scu.yamlfixed-clock.yamlfixed-factor-clock.yamlgoogle,gs101-clock.yamlloongson,ls2k-clk.yamlnxp,imx95-blk-ctl.yamlnxp,imx95-display-master-csr.yamlqcom,hfpll.txtqcom,hfpll.yamlrenesas,rzg2l-cpg.yamlsamsung,s3c6400-clock.yamlsamsung,s3c64xx-clock.txtsophgo,cv1800-clk.yamlst,stm32mp25-rcc.yaml
cpufreq
crypto
nvidia,tegra234-se-aes.yamlnvidia,tegra234-se-hash.yamlomap-sham.txtqcom,inline-crypto-engine.yamlst,stm32-cryp.yamlst,stm32-hash.yamlstarfive,jh7110-crypto.yamlti,omap-sham.yaml
display
atmel,lcdc-display.yamlatmel,lcdc.txtatmel,lcdc.yaml
bridge
exynos
mediatek
msm
panel
abt,y030xx067a.yamlasus,z00t-tm5p5-nt35596.yamlboe,bf060y8m-aj0.yamlboe,himax8279d.yamlboe,th101mb31ig002-28a.yamlboe,tv101wum-nl6.yamlelida,kd35t133.yamlfascontek,fs035vg158.yamlfeixin,k101-im2ba02.yamlhimax,hx83112a.yamlhimax,hx8394.yamlilitek,ili9163.yamlilitek,ili9322.yamlilitek,ili9341.yamlilitek,ili9805.yamlilitek,ili9881c.yamlinnolux,ej030na.yamlinnolux,p097pfg.yamljadard,jd9365da-h3.yamljdi,lpm102a188a.yamljdi,lt070me05000.yamlkingdisplay,kd035g6-54nt.yamlleadtek,ltk035c5444t.yamlleadtek,ltk050h3146w.yamlleadtek,ltk500hd1829.yamllg,lg4573.yamllg,sw43408.yamllgphilips,lb035q02.yamlnec,nl8048hl11.yamlnewvision,nv3051d.yamlnovatek,nt35510.yamlnovatek,nt35950.yamlnovatek,nt36523.yamlnovatek,nt36672a.yamlolimex,lcd-olinuxino.yamlpanel-common-dual.yamlpanel-mipi-dbi-spi.yamlpanel-simple-dsi.yamlpanel-simple.yamlraydium,rm67191.yamlraydium,rm692e5.yamlraydium,rm69380.yamlrocktech,jh057n00900.yaml
|
|
@ -25,23 +25,25 @@ quiet_cmd_extract_ex = DTEX $@
|
|||
$(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE
|
||||
$(call if_changed,extract_ex)
|
||||
|
||||
find_all_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \
|
||||
find_all_cmd = find $(src) \( -name '*.yaml' ! \
|
||||
-name 'processed-schema*' \)
|
||||
|
||||
find_cmd = $(find_all_cmd) | \
|
||||
sed 's|^$(srctree)/||' | \
|
||||
grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))" | \
|
||||
sed 's|^|$(srctree)/|'
|
||||
CHK_DT_DOCS := $(shell $(find_cmd))
|
||||
CHK_DT_EXAMPLES := $(patsubst $(srctree)/%.yaml,%.example.dtb, $(shell $(find_cmd)))
|
||||
|
||||
quiet_cmd_yamllint = LINT $(src)
|
||||
cmd_yamllint = ($(find_cmd) | \
|
||||
xargs -n200 -P$$(nproc) \
|
||||
$(DT_SCHEMA_LINT) -f parsable -c $(srctree)/$(src)/.yamllint >&2) || true
|
||||
$(DT_SCHEMA_LINT) -f parsable -c $(src)/.yamllint >&2) \
|
||||
&& touch $@ || true
|
||||
|
||||
quiet_cmd_chk_bindings = CHKDT $@
|
||||
quiet_cmd_chk_bindings = CHKDT $(src)
|
||||
cmd_chk_bindings = ($(find_cmd) | \
|
||||
xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src)) || true
|
||||
xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(src)) \
|
||||
&& touch $@ || true
|
||||
|
||||
quiet_cmd_mk_schema = SCHEMA $@
|
||||
cmd_mk_schema = f=$$(mktemp) ; \
|
||||
|
|
@ -49,12 +51,6 @@ quiet_cmd_mk_schema = SCHEMA $@
|
|||
$(DT_MK_SCHEMA) -j $(DT_MK_SCHEMA_FLAGS) @$$f > $@ ; \
|
||||
rm -f $$f
|
||||
|
||||
define rule_chkdt
|
||||
$(if $(DT_SCHEMA_LINT),$(call echo-cmd,yamllint) $(cmd_yamllint),); \
|
||||
$(call echo-cmd,chk_bindings) $(cmd_chk_bindings); \
|
||||
$(call echo-cmd,mk_schema) $(cmd_mk_schema)
|
||||
endef
|
||||
|
||||
DT_DOCS = $(patsubst $(srctree)/%,%,$(shell $(find_all_cmd)))
|
||||
|
||||
override DTC_FLAGS := \
|
||||
|
|
@ -64,12 +60,19 @@ override DTC_FLAGS := \
|
|||
-Wno-unique_unit_address \
|
||||
-Wunique_unit_address_if_enabled
|
||||
|
||||
$(obj)/processed-schema.json: $(DT_DOCS) $(src)/.yamllint check_dtschema_version FORCE
|
||||
$(call if_changed_rule,chkdt)
|
||||
$(obj)/processed-schema.json: $(DT_DOCS) check_dtschema_version FORCE
|
||||
$(call if_changed,mk_schema)
|
||||
|
||||
targets += .dt-binding.checked .yamllint.checked
|
||||
$(obj)/.yamllint.checked: $(DT_DOCS) $(src)/.yamllint FORCE
|
||||
$(if $(DT_SCHEMA_LINT),$(call if_changed,yamllint),)
|
||||
|
||||
$(obj)/.dt-binding.checked: $(DT_DOCS) FORCE
|
||||
$(call if_changed,chk_bindings)
|
||||
|
||||
always-y += processed-schema.json
|
||||
always-$(CHECK_DT_BINDING) += $(patsubst $(srctree)/$(src)/%.yaml,%.example.dts, $(CHK_DT_DOCS))
|
||||
always-$(CHECK_DT_BINDING) += $(patsubst $(srctree)/$(src)/%.yaml,%.example.dtb, $(CHK_DT_DOCS))
|
||||
targets += $(patsubst $(obj)/%,%, $(CHK_DT_EXAMPLES))
|
||||
targets += $(patsubst $(obj)/%.dtb,%.dts, $(CHK_DT_EXAMPLES))
|
||||
|
||||
# Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of
|
||||
# build artifacts here before they are processed by scripts/Makefile.clean
|
||||
|
|
@ -78,3 +81,6 @@ clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \
|
|||
|
||||
dt_compatible_check: $(obj)/processed-schema.json
|
||||
$(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $<
|
||||
|
||||
PHONY += dt_binding_check
|
||||
dt_binding_check: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked $(CHK_DT_EXAMPLES)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,84 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/access-controllers/access-controllers.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Generic Domain Access Controllers
|
||||
|
||||
maintainers:
|
||||
- Oleksii Moisieiev <oleksii_moisieiev@epam.com>
|
||||
|
||||
description: |+
|
||||
Common access controllers properties
|
||||
|
||||
Access controllers are in charge of stating which of the hardware blocks under
|
||||
their responsibility (their domain) can be accesssed by which compartment. A
|
||||
compartment can be a cluster of CPUs (or coprocessors), a range of addresses
|
||||
or a group of hardware blocks. An access controller's domain is the set of
|
||||
resources covered by the access controller.
|
||||
|
||||
This device tree binding can be used to bind devices to their access
|
||||
controller provided by access-controllers property. In this case, the device
|
||||
is a consumer and the access controller is the provider.
|
||||
|
||||
An access controller can be represented by any node in the device tree and
|
||||
can provide one or more configuration parameters, needed to control parameters
|
||||
of the consumer device. A consumer node can refer to the provider by phandle
|
||||
and a set of phandle arguments, specified by '#access-controller-cells'
|
||||
property in the access controller node.
|
||||
|
||||
Access controllers are typically used to set/read the permissions of a
|
||||
hardware block and grant access to it. Any of which depends on the access
|
||||
controller. The capabilities of each access controller are defined by the
|
||||
binding of the access controller device.
|
||||
|
||||
Each node can be a consumer for the several access controllers.
|
||||
|
||||
# always select the core schema
|
||||
select: true
|
||||
|
||||
properties:
|
||||
"#access-controller-cells":
|
||||
description:
|
||||
Number of cells in an access-controllers specifier;
|
||||
Can be any value as specified by device tree binding documentation
|
||||
of a particular provider. The node is an access controller.
|
||||
|
||||
access-controller-names:
|
||||
$ref: /schemas/types.yaml#/definitions/string-array
|
||||
description:
|
||||
A list of access-controllers names, sorted in the same order as
|
||||
access-controllers entries. Consumer drivers will use
|
||||
access-controller-names to match with existing access-controllers entries.
|
||||
|
||||
access-controllers:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description:
|
||||
A list of access controller specifiers, as defined by the
|
||||
bindings of the access-controllers provider.
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock_controller: access-controllers@50000 {
|
||||
reg = <0x50000 0x400>;
|
||||
#access-controller-cells = <2>;
|
||||
};
|
||||
|
||||
bus_controller: bus@60000 {
|
||||
reg = <0x60000 0x10000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
#access-controller-cells = <3>;
|
||||
|
||||
uart4: serial@60100 {
|
||||
reg = <0x60100 0x400>;
|
||||
clocks = <&clk_serial>;
|
||||
access-controllers = <&clock_controller 1 2>,
|
||||
<&bus_controller 1 3 5>;
|
||||
access-controller-names = "clock", "bus";
|
||||
};
|
||||
};
|
||||
|
|
@ -1,12 +0,0 @@
|
|||
Altera SOCFPGA SDRAM Controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Should contain "altr,sdr-ctl" and "syscon".
|
||||
syscon is required by the Altera SOCFPGA SDRAM EDAC.
|
||||
- reg : Should contain 1 register range (address and length)
|
||||
|
||||
Example:
|
||||
sdr: sdr@ffc25000 {
|
||||
compatible = "altr,sdr-ctl", "syscon";
|
||||
reg = <0xffc25000 0x1000>;
|
||||
};
|
||||
|
|
@ -157,6 +157,7 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- bananapi,bpi-cm4io
|
||||
- mntre,reform2-cm4
|
||||
- const: bananapi,bpi-cm4
|
||||
- const: amlogic,a311d
|
||||
- const: amlogic,g12b
|
||||
|
|
@ -201,6 +202,18 @@ properties:
|
|||
- amlogic,ad402
|
||||
- const: amlogic,a1
|
||||
|
||||
- description: Boards with the Amlogic A4 A113L2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,ba400
|
||||
- const: amlogic,a4
|
||||
|
||||
- description: Boards with the Amlogic A5 A113X2 SoC
|
||||
items:
|
||||
- enum:
|
||||
- amlogic,av400
|
||||
- const: amlogic,a5
|
||||
|
||||
- description: Boards with the Amlogic C3 C302X/C308L SoC
|
||||
items:
|
||||
- enum:
|
||||
|
|
|
|||
|
|
@ -1,17 +0,0 @@
|
|||
APM X-GENE SoC series SCU Registers
|
||||
|
||||
This system clock unit contain various register that control block resets,
|
||||
clock enable/disables, clock divisors and other deepsleep registers.
|
||||
|
||||
Properties:
|
||||
- compatible : should contain two values. First value must be:
|
||||
- "apm,xgene-scu"
|
||||
second value must be always "syscon".
|
||||
|
||||
- reg : offset and length of the register set.
|
||||
|
||||
Example :
|
||||
scu: system-clk-controller@17000000 {
|
||||
compatible = "apm,xgene-scu","syscon";
|
||||
reg = <0x0 0x17000000 0x0 0x400>;
|
||||
};
|
||||
|
|
@ -35,7 +35,10 @@ properties:
|
|||
- ampere,mtjade-bmc
|
||||
- aspeed,ast2500-evb
|
||||
- asrock,e3c246d4i-bmc
|
||||
- asrock,e3c256d4i-bmc
|
||||
- asrock,romed8hm3-bmc
|
||||
- asrock,spc621d8hm3-bmc
|
||||
- asrock,x570d4u-bmc
|
||||
- bytedance,g220a-bmc
|
||||
- facebook,cmm-bmc
|
||||
- facebook,minipack-bmc
|
||||
|
|
@ -74,15 +77,18 @@ properties:
|
|||
- ampere,mtmitchell-bmc
|
||||
- aspeed,ast2600-evb
|
||||
- aspeed,ast2600-evb-a1
|
||||
- asus,x4tf-bmc
|
||||
- facebook,bletchley-bmc
|
||||
- facebook,cloudripper-bmc
|
||||
- facebook,elbert-bmc
|
||||
- facebook,fuji-bmc
|
||||
- facebook,greatlakes-bmc
|
||||
- facebook,harma-bmc
|
||||
- facebook,minerva-cmc
|
||||
- facebook,yosemite4-bmc
|
||||
- ibm,everest-bmc
|
||||
- ibm,rainier-bmc
|
||||
- ibm,system1-bmc
|
||||
- ibm,tacoma-bmc
|
||||
- inventec,starscream-bmc
|
||||
- inventec,transformer-bmc
|
||||
|
|
|
|||
|
|
@ -53,6 +53,7 @@ properties:
|
|||
- description: BCM4709 based boards
|
||||
items:
|
||||
- enum:
|
||||
- asus,rt-ac3200
|
||||
- asus,rt-ac87u
|
||||
- buffalo,wxr-1900dhp
|
||||
- linksys,ea9200
|
||||
|
|
@ -67,6 +68,7 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- asus,rt-ac3100
|
||||
- asus,rt-ac5300
|
||||
- asus,rt-ac88u
|
||||
- dlink,dir-885l
|
||||
- dlink,dir-890l
|
||||
|
|
|
|||
|
|
@ -46,6 +46,30 @@ properties:
|
|||
- compatible
|
||||
- "#clock-cells"
|
||||
|
||||
gpio:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: raspberrypi,firmware-gpio
|
||||
|
||||
gpio-controller: true
|
||||
|
||||
"#gpio-cells":
|
||||
const: 2
|
||||
description:
|
||||
The first cell is the pin number, and the second cell is used to
|
||||
specify the gpio polarity (GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW).
|
||||
|
||||
gpio-line-names:
|
||||
minItems: 8
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- gpio-controller
|
||||
- "#gpio-cells"
|
||||
|
||||
reset:
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
|
@ -96,6 +120,12 @@ examples:
|
|||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
expgpio: gpio {
|
||||
compatible = "raspberrypi,firmware-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
reset: reset {
|
||||
compatible = "raspberrypi,firmware-reset";
|
||||
#reset-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -813,6 +813,14 @@ properties:
|
|||
- const: tq,imx6ull-tqma6ull2l # MCIMX6Y2, LGA SoM variant
|
||||
- const: fsl,imx6ull
|
||||
|
||||
- description: Seeed Stuido i.MX6ULL SoM on dev boards
|
||||
items:
|
||||
- enum:
|
||||
- seeed,imx6ull-seeed-npi-emmc
|
||||
- seeed,imx6ull-seeed-npi-nand
|
||||
- const: seeed,imx6ull-seeed-npi
|
||||
- const: fsl,imx6ull
|
||||
|
||||
- description: i.MX6ULZ based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
|
@ -1050,6 +1058,7 @@ properties:
|
|||
- enum:
|
||||
- beacon,imx8mp-beacon-kit # i.MX8MP Beacon Development Kit
|
||||
- dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC
|
||||
- emcraft,imx8mp-navqp # i.MX8MP Emcraft Systems NavQ+ Kit
|
||||
- fsl,imx8mp-evk # i.MX8MP EVK Board
|
||||
- gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board
|
||||
- gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board
|
||||
|
|
@ -1218,7 +1227,6 @@ properties:
|
|||
- enum:
|
||||
- einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board
|
||||
- fsl,imx8qxp-mek # i.MX8QXP MEK Board
|
||||
- toradex,colibri-imx8x # Colibri iMX8X Modules
|
||||
- const: fsl,imx8qxp
|
||||
|
||||
- description: i.MX8DXL based Boards
|
||||
|
|
@ -1227,7 +1235,7 @@ properties:
|
|||
- fsl,imx8dxl-evk # i.MX8DXL EVK Board
|
||||
- const: fsl,imx8dxl
|
||||
|
||||
- description: i.MX8QXP Boards with Toradex Colibri iMX8X Modules
|
||||
- description: i.MX8QXP/i.MX8DX Boards with Toradex Colibri iMX8X Modules
|
||||
items:
|
||||
- enum:
|
||||
- toradex,colibri-imx8x-aster # Colibri iMX8X Module on Aster Board
|
||||
|
|
@ -1235,7 +1243,9 @@ properties:
|
|||
- toradex,colibri-imx8x-iris # Colibri iMX8X Module on Iris Board
|
||||
- toradex,colibri-imx8x-iris-v2 # Colibri iMX8X Module on Iris Board V2
|
||||
- const: toradex,colibri-imx8x
|
||||
- const: fsl,imx8qxp
|
||||
- enum:
|
||||
- fsl,imx8qxp
|
||||
- fsl,imx8dx
|
||||
|
||||
- description:
|
||||
TQMa8Xx is a series of SOM featuring NXP i.MX8X system-on-chip
|
||||
|
|
@ -1536,6 +1546,12 @@ properties:
|
|||
- nxp,s32g274a-rdb2
|
||||
- const: nxp,s32g2
|
||||
|
||||
- description: S32G3 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- nxp,s32g399a-rdb3
|
||||
- const: nxp,s32g3
|
||||
|
||||
- description: S32V234 based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
|
|
|||
|
|
@ -61,10 +61,6 @@ properties:
|
|||
mboxes:
|
||||
minItems: 2
|
||||
|
||||
ti,system-reboot-controller:
|
||||
description: Determines If system reboot can be triggered by SoC reboot
|
||||
type: boolean
|
||||
|
||||
ti,host-id:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
|
|
@ -94,7 +90,6 @@ examples:
|
|||
- |
|
||||
pmmc: system-controller@2921800 {
|
||||
compatible = "ti,k2g-sci";
|
||||
ti,system-reboot-controller;
|
||||
mbox-names = "rx", "tx";
|
||||
mboxes = <&msgmgr 5 2>,
|
||||
<&msgmgr 0 0>;
|
||||
|
|
|
|||
|
|
@ -1,32 +0,0 @@
|
|||
Power management
|
||||
----------------
|
||||
|
||||
For power management (particularly DVFS and AVS), the North Bridge
|
||||
Power Management component is needed:
|
||||
|
||||
Required properties:
|
||||
- compatible : should contain "marvell,armada-3700-nb-pm", "syscon";
|
||||
- reg : the register start and length for the North Bridge
|
||||
Power Management
|
||||
|
||||
Example:
|
||||
|
||||
nb_pm: syscon@14000 {
|
||||
compatible = "marvell,armada-3700-nb-pm", "syscon";
|
||||
reg = <0x14000 0x60>;
|
||||
}
|
||||
|
||||
AVS
|
||||
---
|
||||
|
||||
For AVS an other component is needed:
|
||||
|
||||
Required properties:
|
||||
- compatible : should contain "marvell,armada-3700-avs", "syscon";
|
||||
- reg : the register start and length for the AVS
|
||||
|
||||
Example:
|
||||
avs: avs@11500 {
|
||||
compatible = "marvell,armada-3700-avs", "syscon";
|
||||
reg = <0x11500 0x40>;
|
||||
}
|
||||
|
|
@ -66,13 +66,11 @@ properties:
|
|||
- const: apb_pclk
|
||||
|
||||
in-ports:
|
||||
type: object
|
||||
description: |
|
||||
Input connections from TPDM to TPDA
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
out-ports:
|
||||
type: object
|
||||
description: |
|
||||
Output connections from the TPDA to legacy CoreSight trace bus.
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
|
@ -97,33 +95,31 @@ examples:
|
|||
# minimum tpda definition.
|
||||
- |
|
||||
tpda@6004000 {
|
||||
compatible = "qcom,coresight-tpda", "arm,primecell";
|
||||
reg = <0x6004000 0x1000>;
|
||||
compatible = "qcom,coresight-tpda", "arm,primecell";
|
||||
reg = <0x6004000 0x1000>;
|
||||
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
clocks = <&aoss_qmp>;
|
||||
clock-names = "apb_pclk";
|
||||
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
in-ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
tpda_qdss_0_in_tpdm_dcc: endpoint {
|
||||
remote-endpoint =
|
||||
<&tpdm_dcc_out_tpda_qdss_0>;
|
||||
};
|
||||
remote-endpoint = <&tpdm_dcc_out_tpda_qdss_0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
out-ports {
|
||||
port {
|
||||
tpda_qdss_out_funnel_in0: endpoint {
|
||||
remote-endpoint =
|
||||
<&funnel_in0_in_tpda_qdss>;
|
||||
};
|
||||
out-ports {
|
||||
port {
|
||||
tpda_qdss_out_funnel_in0: endpoint {
|
||||
remote-endpoint = <&funnel_in0_in_tpda_qdss>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -137,6 +137,7 @@ properties:
|
|||
- microsoft,dempsey
|
||||
- microsoft,makepeace
|
||||
- microsoft,moneypenny
|
||||
- motorola,falcon
|
||||
- samsung,s3ve3g
|
||||
- const: qcom,msm8226
|
||||
|
||||
|
|
@ -184,13 +185,16 @@ properties:
|
|||
- oneplus,bacon
|
||||
- samsung,klte
|
||||
- sony,xperia-castor
|
||||
- sony,xperia-leo
|
||||
- const: qcom,msm8974pro
|
||||
- const: qcom,msm8974
|
||||
|
||||
- items:
|
||||
- const: qcom,msm8916-mtp
|
||||
- const: qcom,msm8916-mtp/1
|
||||
- const: qcom,msm8916
|
||||
- enum:
|
||||
- samsung,kltechn
|
||||
- const: samsung,klte
|
||||
- const: qcom,msm8974pro
|
||||
- const: qcom,msm8974
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
|
|
@ -200,6 +204,8 @@ properties:
|
|||
- gplus,fl8005a
|
||||
- huawei,g7
|
||||
- longcheer,l8910
|
||||
- longcheer,l8150
|
||||
- qcom,msm8916-mtp
|
||||
- samsung,a3u-eur
|
||||
- samsung,a5u-eur
|
||||
- samsung,e5
|
||||
|
|
@ -220,11 +226,6 @@ properties:
|
|||
- yiming,uz801-v3
|
||||
- const: qcom,msm8916
|
||||
|
||||
- items:
|
||||
- const: longcheer,l8150
|
||||
- const: qcom,msm8916-v1-qrd/9-v1
|
||||
- const: qcom,msm8916
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- motorola,potter
|
||||
|
|
@ -1003,6 +1004,7 @@ properties:
|
|||
- qcom,sm8550-hdk
|
||||
- qcom,sm8550-mtp
|
||||
- qcom,sm8550-qrd
|
||||
- sony,pdx234
|
||||
- const: qcom,sm8550
|
||||
|
||||
- items:
|
||||
|
|
|
|||
|
|
@ -49,6 +49,11 @@ properties:
|
|||
- anbernic,rg-arc-s
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: ArmSoM Sige7 board
|
||||
items:
|
||||
- const: armsom,sige7
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: Asus Tinker board
|
||||
items:
|
||||
- const: asus,rk3288-tinker
|
||||
|
|
@ -198,6 +203,13 @@ properties:
|
|||
- const: firefly,rk3568-roc-pc
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Forlinx FET3588-C SoM
|
||||
items:
|
||||
- enum:
|
||||
- forlinx,ok3588-c
|
||||
- const: forlinx,fet3588-c
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: FriendlyElec NanoPi R2 series boards
|
||||
items:
|
||||
- enum:
|
||||
|
|
@ -236,6 +248,11 @@ properties:
|
|||
- const: friendlyarm,nanopc-t6
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: GameForce Chi
|
||||
items:
|
||||
- const: gameforce,chi
|
||||
- const: rockchip,rk3326
|
||||
|
||||
- description: GeekBuying GeekBox
|
||||
items:
|
||||
- const: geekbuying,geekbox
|
||||
|
|
@ -631,7 +648,7 @@ properties:
|
|||
- const: phytec,rk3288-phycore-som
|
||||
- const: rockchip,rk3288
|
||||
|
||||
- description: Pine64 PinebookPro
|
||||
- description: Pine64 Pinebook Pro
|
||||
items:
|
||||
- const: pine64,pinebook-pro
|
||||
- const: rockchip,rk3399
|
||||
|
|
@ -644,7 +661,7 @@ properties:
|
|||
- const: pine64,pinenote
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: Pine64 PinePhonePro
|
||||
- description: Pine64 PinePhone Pro
|
||||
items:
|
||||
- const: pine64,pinephone-pro
|
||||
- const: rockchip,rk3399
|
||||
|
|
@ -682,7 +699,7 @@ properties:
|
|||
- const: pine64,quartzpro64
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: Pine64 SoQuartz SoM
|
||||
- description: Pine64 SOQuartz
|
||||
items:
|
||||
- enum:
|
||||
- pine64,soquartz-blade
|
||||
|
|
@ -700,12 +717,17 @@ properties:
|
|||
- powkiddy,x55
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: Protonic MECSBC board
|
||||
items:
|
||||
- const: prt,mecsbc
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: QNAP TS-433-4G 4-Bay NAS
|
||||
items:
|
||||
- const: qnap,ts433
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Radxa Compute Module 3(CM3)
|
||||
- description: Radxa Compute Module 3 (CM3)
|
||||
items:
|
||||
- enum:
|
||||
- radxa,cm3-io
|
||||
|
|
@ -767,22 +789,27 @@ properties:
|
|||
- const: radxa,rockpis
|
||||
- const: rockchip,rk3308
|
||||
|
||||
- description: Radxa Rock2 Square
|
||||
- description: Radxa Rock 2 Square
|
||||
items:
|
||||
- const: radxa,rock2-square
|
||||
- const: rockchip,rk3288
|
||||
|
||||
- description: Radxa ROCK3 Model A
|
||||
- description: Radxa ROCK 3A
|
||||
items:
|
||||
- const: radxa,rock3a
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Radxa ROCK 5 Model A
|
||||
- description: Radxa ROCK 3C
|
||||
items:
|
||||
- const: radxa,rock-3c
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: Radxa ROCK 5A
|
||||
items:
|
||||
- const: radxa,rock-5a
|
||||
- const: rockchip,rk3588s
|
||||
|
||||
- description: Radxa ROCK 5 Model B
|
||||
- description: Radxa ROCK 5B
|
||||
items:
|
||||
- const: radxa,rock-5b
|
||||
- const: rockchip,rk3588
|
||||
|
|
@ -927,6 +954,11 @@ properties:
|
|||
- const: turing,rk1
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: WolfVision PF5 mainboard
|
||||
items:
|
||||
- const: wolfvision,rk3568-pf5
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Xunlong Orange Pi 5 Plus
|
||||
items:
|
||||
- const: xunlong,orangepi-5-plus
|
||||
|
|
|
|||
|
|
@ -54,11 +54,10 @@ unevaluatedProperties: false
|
|||
|
||||
examples:
|
||||
- |
|
||||
mlahb: ahb@38000000 {
|
||||
ahb {
|
||||
compatible = "st,mlahb", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x10000000 0x40000>;
|
||||
ranges;
|
||||
dma-ranges = <0x00000000 0x38000000 0x10000>,
|
||||
<0x10000000 0x10000000 0x60000>,
|
||||
|
|
|
|||
|
|
@ -56,6 +56,21 @@ properties:
|
|||
- const: anbernic,rg-nano
|
||||
- const: allwinner,sun8i-v3s
|
||||
|
||||
- description: Anbernic RG35XX (2024)
|
||||
items:
|
||||
- const: anbernic,rg35xx-2024
|
||||
- const: allwinner,sun50i-h700
|
||||
|
||||
- description: Anbernic RG35XX Plus
|
||||
items:
|
||||
- const: anbernic,rg35xx-plus
|
||||
- const: allwinner,sun50i-h700
|
||||
|
||||
- description: Anbernic RG35XX H
|
||||
items:
|
||||
- const: anbernic,rg35xx-h
|
||||
- const: allwinner,sun50i-h700
|
||||
|
||||
- description: Amarula A64 Relic
|
||||
items:
|
||||
- const: amarula,a64-relic
|
||||
|
|
@ -774,6 +789,11 @@ properties:
|
|||
- const: pocketbook,touch-lux-3
|
||||
- const: allwinner,sun5i-a13
|
||||
|
||||
- description: PocketBook 614 Plus
|
||||
items:
|
||||
- const: pocketbook,614-plus
|
||||
- const: allwinner,sun5i-a13
|
||||
|
||||
- description: Point of View Protab2-IPS9
|
||||
items:
|
||||
- const: pov,protab2-ips9
|
||||
|
|
@ -860,6 +880,11 @@ properties:
|
|||
- const: allwinner,sl631
|
||||
- const: allwinner,sun8i-v3
|
||||
|
||||
- description: Tanix TX1
|
||||
items:
|
||||
- const: oranth,tanix-tx1
|
||||
- const: allwinner,sun50i-h616
|
||||
|
||||
- description: Tanix TX6
|
||||
items:
|
||||
- const: oranth,tanix-tx6
|
||||
|
|
|
|||
|
|
@ -1,18 +0,0 @@
|
|||
Device tree binding for the TI DA850 AHCI SATA Controller
|
||||
---------------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "ti,da850-ahci"
|
||||
- reg: physical base addresses and sizes of the two register regions
|
||||
used by the controller: the register map as defined by the
|
||||
AHCI 1.1 standard and the Power Down Control Register (PWRDN)
|
||||
for enabling/disabling the SATA clock receiver
|
||||
- interrupts: interrupt specifier (refer to the interrupt binding)
|
||||
|
||||
Example:
|
||||
|
||||
sata: sata@218000 {
|
||||
compatible = "ti,da850-ahci";
|
||||
reg = <0x218000 0x2000>, <0x22c018 0x4>;
|
||||
interrupts = <67>;
|
||||
};
|
||||
42
dts/upstream/Bindings/ata/fsl,imx-pata.yaml
Normal file
42
dts/upstream/Bindings/ata/fsl,imx-pata.yaml
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/fsl,imx-pata.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX PATA Controller
|
||||
|
||||
maintainers:
|
||||
- Animesh Agarwal <animeshagarwal28@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,imx31-pata
|
||||
- fsl,imx51-pata
|
||||
- const: fsl,imx27-pata
|
||||
- const: fsl,imx27-pata
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: PATA Controller interrupts
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: PATA Controller clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
pata: pata@83fe0000 {
|
||||
compatible = "fsl,imx51-pata", "fsl,imx27-pata";
|
||||
reg = <0x83fe0000 0x4000>;
|
||||
interrupts = <70>;
|
||||
clocks = <&clks 161>;
|
||||
};
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
* Freescale i.MX PATA Controller
|
||||
|
||||
Required properties:
|
||||
- compatible: "fsl,imx27-pata"
|
||||
- reg: Address range of the PATA Controller
|
||||
- interrupts: The interrupt of the PATA Controller
|
||||
- clocks: the clocks for the PATA Controller
|
||||
|
||||
Example:
|
||||
|
||||
pata: pata@83fe0000 {
|
||||
compatible = "fsl,imx51-pata", "fsl,imx27-pata";
|
||||
reg = <0x83fe0000 0x4000>;
|
||||
interrupts = <70>;
|
||||
clocks = <&clks 161>;
|
||||
};
|
||||
39
dts/upstream/Bindings/ata/ti,da850-ahci.yaml
Normal file
39
dts/upstream/Bindings/ata/ti,da850-ahci.yaml
Normal file
|
|
@ -0,0 +1,39 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/ti,da850-ahci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI DA850 AHCI SATA Controller
|
||||
|
||||
maintainers:
|
||||
- Animesh Agarwal <animeshagarwal28@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,da850-ahci
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: Address and size of the register map as defined by the AHCI 1.1 standard.
|
||||
- description:
|
||||
Address and size of Power Down Control Register (PWRDN) for enabling/disabling the SATA clock
|
||||
receiver.
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sata@218000 {
|
||||
compatible = "ti,da850-ahci";
|
||||
reg = <0x218000 0x2000>, <0x22c018 0x4>;
|
||||
interrupts = <67>;
|
||||
};
|
||||
96
dts/upstream/Bindings/bus/st,stm32-etzpc.yaml
Normal file
96
dts/upstream/Bindings/bus/st,stm32-etzpc.yaml
Normal file
|
|
@ -0,0 +1,96 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STM32 Extended TrustZone protection controller
|
||||
|
||||
description: |
|
||||
The ETZPC configures TrustZone security in a SoC having bus masters and
|
||||
devices with programmable-security attributes (securable resources).
|
||||
|
||||
maintainers:
|
||||
- Gatien Chevallier <gatien.chevallier@foss.st.com>
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: st,stm32-etzpc
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: st,stm32-etzpc
|
||||
- const: simple-bus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
"#access-controller-cells":
|
||||
const: 1
|
||||
description:
|
||||
Contains the firewall ID associated to the peripheral.
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-f]+$":
|
||||
description: Peripherals
|
||||
type: object
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
required:
|
||||
- access-controllers
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- "#access-controller-cells"
|
||||
- ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
// In this example, the usart2 device refers to rifsc as its access
|
||||
// controller.
|
||||
// Access rights are verified before creating devices.
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/stm32mp13-clks.h>
|
||||
#include <dt-bindings/reset/stm32mp13-resets.h>
|
||||
|
||||
etzpc: bus@5c007000 {
|
||||
compatible = "st,stm32-etzpc", "simple-bus";
|
||||
reg = <0x5c007000 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#access-controller-cells = <1>;
|
||||
ranges;
|
||||
|
||||
usart2: serial@4c001000 {
|
||||
compatible = "st,stm32h7-uart";
|
||||
reg = <0x4c001000 0x400>;
|
||||
interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&rcc USART2_K>;
|
||||
resets = <&rcc USART2_R>;
|
||||
wakeup-source;
|
||||
dmas = <&dmamux1 43 0x400 0x5>,
|
||||
<&dmamux1 44 0x400 0x1>;
|
||||
dma-names = "rx", "tx";
|
||||
access-controllers = <&etzpc 17>;
|
||||
};
|
||||
};
|
||||
105
dts/upstream/Bindings/bus/st,stm32mp25-rifsc.yaml
Normal file
105
dts/upstream/Bindings/bus/st,stm32mp25-rifsc.yaml
Normal file
|
|
@ -0,0 +1,105 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STM32 Resource isolation framework security controller
|
||||
|
||||
maintainers:
|
||||
- Gatien Chevallier <gatien.chevallier@foss.st.com>
|
||||
|
||||
description: |
|
||||
Resource isolation framework (RIF) is a comprehensive set of hardware blocks
|
||||
designed to enforce and manage isolation of STM32 hardware resources like
|
||||
memory and peripherals.
|
||||
|
||||
The RIFSC (RIF security controller) is composed of three sets of registers,
|
||||
each managing a specific set of hardware resources:
|
||||
- RISC registers associated with RISUP logic (resource isolation device unit
|
||||
for peripherals), assign all non-RIF aware peripherals to zero, one or
|
||||
any security domains (secure, privilege, compartment).
|
||||
- RIMC registers: associated with RIMU logic (resource isolation master
|
||||
unit), assign all non RIF-aware bus master to one security domain by
|
||||
setting secure, privileged and compartment information on the system bus.
|
||||
Alternatively, the RISUP logic controlling the device port access to a
|
||||
peripheral can assign target bus attributes to this peripheral master port
|
||||
(supported attribute: CID).
|
||||
- RISC registers associated with RISAL logic (resource isolation device unit
|
||||
for address space - Lite version), assign address space subregions to one
|
||||
security domains (secure, privilege, compartment).
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: st,stm32mp25-rifsc
|
||||
required:
|
||||
- compatible
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: st,stm32mp25-rifsc
|
||||
- const: simple-bus
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 1
|
||||
|
||||
"#size-cells":
|
||||
const: 1
|
||||
|
||||
ranges: true
|
||||
|
||||
"#access-controller-cells":
|
||||
const: 1
|
||||
description:
|
||||
Contains the firewall ID associated to the peripheral.
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-f]+$":
|
||||
description: Peripherals
|
||||
type: object
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
required:
|
||||
- access-controllers
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- "#access-controller-cells"
|
||||
- ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
// In this example, the usart2 device refers to rifsc as its domain
|
||||
// controller.
|
||||
// Access rights are verified before creating devices.
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
rifsc: bus@42080000 {
|
||||
compatible = "st,stm32mp25-rifsc", "simple-bus";
|
||||
reg = <0x42080000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#access-controller-cells = <1>;
|
||||
ranges;
|
||||
|
||||
usart2: serial@400e0000 {
|
||||
compatible = "st,stm32h7-uart";
|
||||
reg = <0x400e0000 0x400>;
|
||||
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&ck_flexgen_08>;
|
||||
access-controllers = <&rifsc 32>;
|
||||
};
|
||||
};
|
||||
2
dts/upstream/Bindings/cache/qcom,llcc.yaml
vendored
2
dts/upstream/Bindings/cache/qcom,llcc.yaml
vendored
|
|
@ -66,7 +66,6 @@ allOf:
|
|||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,qdu1000-llcc
|
||||
- qcom,sc7180-llcc
|
||||
- qcom,sm6350-llcc
|
||||
then:
|
||||
|
|
@ -104,6 +103,7 @@ allOf:
|
|||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,qdu1000-llcc
|
||||
- qcom,sc8180x-llcc
|
||||
- qcom,sc8280xp-llcc
|
||||
- qcom,x1e80100-llcc
|
||||
|
|
|
|||
|
|
@ -29,10 +29,13 @@ description: |
|
|||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: airoha,en7523-scu
|
||||
- enum:
|
||||
- airoha,en7523-scu
|
||||
- airoha,en7581-scu
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
minItems: 2
|
||||
maxItems: 3
|
||||
|
||||
"#clock-cells":
|
||||
description:
|
||||
|
|
@ -45,6 +48,30 @@ required:
|
|||
- reg
|
||||
- '#clock-cells'
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
const: airoha,en7523-scu
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: scu base address
|
||||
- description: misc scu base address
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
const: airoha,en7581-scu
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
items:
|
||||
- description: scu base address
|
||||
- description: misc scu base address
|
||||
- description: pb scu base address
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -11,6 +11,15 @@ maintainers:
|
|||
- Stephen Boyd <sboyd@kernel.org>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
anyOf:
|
||||
- description:
|
||||
Preferred name is 'clock-<freq>' with <freq> being the output
|
||||
frequency as defined in the 'clock-frequency' property.
|
||||
pattern: "^clock-([0-9]+|[a-z0-9-]+)$"
|
||||
- description: Any name allowed
|
||||
deprecated: true
|
||||
|
||||
compatible:
|
||||
const: fixed-clock
|
||||
|
||||
|
|
|
|||
|
|
@ -11,6 +11,15 @@ maintainers:
|
|||
- Stephen Boyd <sboyd@kernel.org>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
anyOf:
|
||||
- description:
|
||||
If the frequency is fixed, the preferred name is 'clock-<freq>' with
|
||||
<freq> being the output frequency.
|
||||
pattern: "^clock-([0-9]+|[0-9a-z-]+)$"
|
||||
- description: Any name allowed
|
||||
deprecated: true
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- fixed-factor-clock
|
||||
|
|
|
|||
|
|
@ -30,16 +30,18 @@ properties:
|
|||
- google,gs101-cmu-top
|
||||
- google,gs101-cmu-apm
|
||||
- google,gs101-cmu-misc
|
||||
- google,gs101-cmu-hsi0
|
||||
- google,gs101-cmu-hsi2
|
||||
- google,gs101-cmu-peric0
|
||||
- google,gs101-cmu-peric1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
maxItems: 5
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
maxItems: 5
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
|
@ -72,6 +74,55 @@ allOf:
|
|||
items:
|
||||
- const: oscclk
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: google,gs101-cmu-hsi0
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: External reference clock (24.576 MHz)
|
||||
- description: HSI0 bus clock (from CMU_TOP)
|
||||
- description: DPGTC (from CMU_TOP)
|
||||
- description: USB DRD controller clock (from CMU_TOP)
|
||||
- description: USB Display Port debug clock (from CMU_TOP)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: oscclk
|
||||
- const: bus
|
||||
- const: dpgtc
|
||||
- const: usb31drd
|
||||
- const: usbdpdbg
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- google,gs101-cmu-hsi2
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: External reference clock (24.576 MHz)
|
||||
- description: High Speed Interface bus clock (from CMU_TOP)
|
||||
- description: High Speed Interface pcie clock (from CMU_TOP)
|
||||
- description: High Speed Interface ufs clock (from CMU_TOP)
|
||||
- description: High Speed Interface mmc clock (from CMU_TOP)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: oscclk
|
||||
- const: bus
|
||||
- const: pcie
|
||||
- const: ufs
|
||||
- const: mmc
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -16,7 +16,9 @@ description: |
|
|||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- loongson,ls2k-clk
|
||||
- loongson,ls2k0500-clk
|
||||
- loongson,ls2k-clk # This is for Loongson-2K1000
|
||||
- loongson,ls2k2000-clk
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
56
dts/upstream/Bindings/clock/nxp,imx95-blk-ctl.yaml
Normal file
56
dts/upstream/Bindings/clock/nxp,imx95-blk-ctl.yaml
Normal file
|
|
@ -0,0 +1,56 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/nxp,imx95-blk-ctl.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP i.MX95 Block Control
|
||||
|
||||
maintainers:
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- nxp,imx95-lvds-csr
|
||||
- nxp,imx95-display-csr
|
||||
- nxp,imx95-camera-csr
|
||||
- nxp,imx95-vpu-csr
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
description:
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell. See
|
||||
include/dt-bindings/clock/nxp,imx95-clock.h
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- power-domains
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
syscon@4c410000 {
|
||||
compatible = "nxp,imx95-vpu-csr", "syscon";
|
||||
reg = <0x4c410000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&scmi_clk 114>;
|
||||
power-domains = <&scmi_devpd 21>;
|
||||
};
|
||||
...
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/nxp,imx95-display-master-csr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP i.MX95 Display Master Block Control
|
||||
|
||||
maintainers:
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: nxp,imx95-display-master-csr
|
||||
- const: syscon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
description:
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell. See
|
||||
include/dt-bindings/clock/nxp,imx95-clock.h
|
||||
|
||||
mux-controller:
|
||||
type: object
|
||||
$ref: /schemas/mux/reg-mux.yaml
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- mux-controller
|
||||
- power-domains
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
syscon@4c410000 {
|
||||
compatible = "nxp,imx95-display-master-csr", "syscon";
|
||||
reg = <0x4c410000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&scmi_clk 62>;
|
||||
power-domains = <&scmi_devpd 3>;
|
||||
|
||||
mux: mux-controller {
|
||||
compatible = "mmio-mux";
|
||||
#mux-control-cells = <1>;
|
||||
mux-reg-masks = <0x4 0x00000001>; /* Pixel_link_sel */
|
||||
idle-states = <0>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -1,63 +0,0 @@
|
|||
High-Frequency PLL (HFPLL)
|
||||
|
||||
PROPERTIES
|
||||
|
||||
- compatible:
|
||||
Usage: required
|
||||
Value type: <string>:
|
||||
shall contain only one of the following. The generic
|
||||
compatible "qcom,hfpll" should be also included.
|
||||
|
||||
"qcom,hfpll-ipq8064", "qcom,hfpll"
|
||||
"qcom,hfpll-apq8064", "qcom,hfpll"
|
||||
"qcom,hfpll-msm8974", "qcom,hfpll"
|
||||
"qcom,hfpll-msm8960", "qcom,hfpll"
|
||||
"qcom,msm8976-hfpll-a53", "qcom,hfpll"
|
||||
"qcom,msm8976-hfpll-a72", "qcom,hfpll"
|
||||
"qcom,msm8976-hfpll-cci", "qcom,hfpll"
|
||||
|
||||
- reg:
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: address and size of HPLL registers. An optional second
|
||||
element specifies the address and size of the alias
|
||||
register region.
|
||||
|
||||
- clocks:
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: reference to the xo clock.
|
||||
|
||||
- clock-names:
|
||||
Usage: required
|
||||
Value type: <stringlist>
|
||||
Definition: must be "xo".
|
||||
|
||||
- clock-output-names:
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Name of the PLL. Typically hfpllX where X is a CPU number
|
||||
starting at 0. Otherwise hfpll_Y where Y is more specific
|
||||
such as "l2".
|
||||
|
||||
Example:
|
||||
|
||||
1) An HFPLL for the L2 cache.
|
||||
|
||||
clock-controller@f9016000 {
|
||||
compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
|
||||
reg = <0xf9016000 0x30>;
|
||||
clocks = <&xo_board>;
|
||||
clock-names = "xo";
|
||||
clock-output-names = "hfpll_l2";
|
||||
};
|
||||
|
||||
2) An HFPLL for CPU0. This HFPLL has the alias register region.
|
||||
|
||||
clock-controller@f908a000 {
|
||||
compatible = "qcom,hfpll-ipq8064", "qcom,hfpll";
|
||||
reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
|
||||
clocks = <&xo_board>;
|
||||
clock-names = "xo";
|
||||
clock-output-names = "hfpll0";
|
||||
};
|
||||
69
dts/upstream/Bindings/clock/qcom,hfpll.yaml
Normal file
69
dts/upstream/Bindings/clock/qcom,hfpll.yaml
Normal file
|
|
@ -0,0 +1,69 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/qcom,hfpll.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm High-Frequency PLL
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
description:
|
||||
The HFPLL is used as CPU PLL on various Qualcomm SoCs.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- qcom,msm8974-hfpll
|
||||
- qcom,msm8976-hfpll-a53
|
||||
- qcom,msm8976-hfpll-a72
|
||||
- qcom,msm8976-hfpll-cci
|
||||
- qcom,qcs404-hfpll
|
||||
- const: qcom,hfpll
|
||||
deprecated: true
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: HFPLL registers
|
||||
- description: Alias register region
|
||||
minItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: board XO clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: xo
|
||||
|
||||
clock-output-names:
|
||||
description:
|
||||
Name of the PLL. Typically hfpllX where X is a CPU number starting at 0.
|
||||
Otherwise hfpll_Y where Y is more specific such as "l2".
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#clock-cells'
|
||||
- clocks
|
||||
- clock-names
|
||||
- clock-output-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-controller@f908a000 {
|
||||
compatible = "qcom,msm8974-hfpll";
|
||||
reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
|
||||
#clock-cells = <0>;
|
||||
clock-output-names = "hfpll0";
|
||||
clocks = <&xo_board>;
|
||||
clock-names = "xo";
|
||||
};
|
||||
|
|
@ -57,7 +57,8 @@ properties:
|
|||
can be power-managed through Module Standby should refer to the CPG device
|
||||
node in their "power-domains" property, as documented by the generic PM
|
||||
Domain bindings in Documentation/devicetree/bindings/power/power-domain.yaml.
|
||||
const: 0
|
||||
The power domain specifiers defined in <dt-bindings/clock/r9a0*-cpg.h> could
|
||||
be used to reference individual CPG power domains.
|
||||
|
||||
'#reset-cells':
|
||||
description:
|
||||
|
|
@ -76,6 +77,21 @@ required:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,r9a08g045-cpg
|
||||
then:
|
||||
properties:
|
||||
'#power-domain-cells':
|
||||
const: 1
|
||||
else:
|
||||
properties:
|
||||
'#power-domain-cells':
|
||||
const: 0
|
||||
|
||||
examples:
|
||||
- |
|
||||
cpg: clock-controller@11010000 {
|
||||
|
|
|
|||
57
dts/upstream/Bindings/clock/samsung,s3c6400-clock.yaml
Normal file
57
dts/upstream/Bindings/clock/samsung,s3c6400-clock.yaml
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/samsung,s3c6400-clock.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Samsung S3C6400 SoC clock controller
|
||||
|
||||
maintainers:
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
|
||||
description: |
|
||||
There are several clocks that are generated outside the SoC. It is expected
|
||||
that they are defined using standard clock bindings with following
|
||||
clock-output-names and/or provided as clock inputs to this clock controller:
|
||||
- "fin_pll" - PLL input clock (xtal/extclk) - required,
|
||||
- "xusbxti" - USB xtal - required,
|
||||
- "iiscdclk0" - I2S0 codec clock - optional,
|
||||
- "iiscdclk1" - I2S1 codec clock - optional,
|
||||
- "iiscdclk2" - I2S2 codec clock - optional,
|
||||
- "pcmcdclk0" - PCM0 codec clock - optional,
|
||||
- "pcmcdclk1" - PCM1 codec clock - optional, only S3C6410.
|
||||
|
||||
All available clocks are defined as preprocessor macros in
|
||||
include/dt-bindings/clock/samsung,s3c64xx-clock.h header.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,s3c6400-clock
|
||||
- samsung,s3c6410-clock
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- "#clock-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-controller@7e00f000 {
|
||||
compatible = "samsung,s3c6410-clock";
|
||||
reg = <0x7e00f000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&fin_pll>;
|
||||
};
|
||||
|
|
@ -1,76 +0,0 @@
|
|||
* Samsung S3C64xx Clock Controller
|
||||
|
||||
The S3C64xx clock controller generates and supplies clock to various controllers
|
||||
within the SoC. The clock binding described here is applicable to all SoCs in
|
||||
the S3C64xx family.
|
||||
|
||||
Required Properties:
|
||||
|
||||
- compatible: should be one of the following.
|
||||
- "samsung,s3c6400-clock" - controller compatible with S3C6400 SoC.
|
||||
- "samsung,s3c6410-clock" - controller compatible with S3C6410 SoC.
|
||||
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
||||
- #clock-cells: should be 1.
|
||||
|
||||
Each clock is assigned an identifier and client nodes can use this identifier
|
||||
to specify the clock which they consume. Some of the clocks are available only
|
||||
on a particular S3C64xx SoC and this is specified where applicable.
|
||||
|
||||
All available clocks are defined as preprocessor macros in
|
||||
dt-bindings/clock/samsung,s3c64xx-clock.h header and can be used in device
|
||||
tree sources.
|
||||
|
||||
External clocks:
|
||||
|
||||
There are several clocks that are generated outside the SoC. It is expected
|
||||
that they are defined using standard clock bindings with following
|
||||
clock-output-names:
|
||||
- "fin_pll" - PLL input clock (xtal/extclk) - required,
|
||||
- "xusbxti" - USB xtal - required,
|
||||
- "iiscdclk0" - I2S0 codec clock - optional,
|
||||
- "iiscdclk1" - I2S1 codec clock - optional,
|
||||
- "iiscdclk2" - I2S2 codec clock - optional,
|
||||
- "pcmcdclk0" - PCM0 codec clock - optional,
|
||||
- "pcmcdclk1" - PCM1 codec clock - optional, only S3C6410.
|
||||
|
||||
Example: Clock controller node:
|
||||
|
||||
clock: clock-controller@7e00f000 {
|
||||
compatible = "samsung,s3c6410-clock";
|
||||
reg = <0x7e00f000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
Example: Required external clocks:
|
||||
|
||||
fin_pll: clock-fin-pll {
|
||||
compatible = "fixed-clock";
|
||||
clock-output-names = "fin_pll";
|
||||
clock-frequency = <12000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
xusbxti: clock-xusbxti {
|
||||
compatible = "fixed-clock";
|
||||
clock-output-names = "xusbxti";
|
||||
clock-frequency = <48000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
|
||||
Example: UART controller node that consumes the clock generated by the clock
|
||||
controller (refer to the standard clock bindings for information about
|
||||
"clocks" and "clock-names" properties):
|
||||
|
||||
uart0: serial@7f005000 {
|
||||
compatible = "samsung,s3c6400-uart";
|
||||
reg = <0x7f005000 0x100>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <5>;
|
||||
clock-names = "uart", "clk_uart_baud2",
|
||||
"clk_uart_baud3";
|
||||
clocks = <&clock PCLK_UART0>, <&clocks PCLK_UART0>,
|
||||
<&clock SCLK_UART>;
|
||||
};
|
||||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/clock/sophgo,cv1800-clk.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Sophgo CV1800 Series Clock Controller
|
||||
title: Sophgo CV1800/SG2000 Series Clock Controller
|
||||
|
||||
maintainers:
|
||||
- Inochi Amaoto <inochiama@outlook.com>
|
||||
|
|
@ -14,6 +14,7 @@ properties:
|
|||
enum:
|
||||
- sophgo,cv1800-clk
|
||||
- sophgo,cv1810-clk
|
||||
- sophgo,sg2000-clk
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -38,14 +38,85 @@ properties:
|
|||
- description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz)
|
||||
- description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
|
||||
- description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
|
||||
- description: CK_SCMI_HSE_DIV2 CK_SCMI_HSE divided by 2 (coud be gated)
|
||||
- description: CK_SCMI_ICN_HS_MCU High Speed interconnect bus clock
|
||||
- description: CK_SCMI_ICN_LS_MCU Low Speed interconnect bus clock
|
||||
- description: CK_SCMI_ICN_SDMMC SDMMC interconnect bus clock
|
||||
- description: CK_SCMI_ICN_DDR DDR interconnect bus clock
|
||||
- description: CK_SCMI_ICN_DISPLAY Display interconnect bus clock
|
||||
- description: CK_SCMI_ICN_HSL HSL interconnect bus clock
|
||||
- description: CK_SCMI_ICN_NIC NIC interconnect bus clock
|
||||
- description: CK_SCMI_ICN_VID Video interconnect bus clock
|
||||
- description: CK_SCMI_FLEXGEN_07 flexgen clock 7
|
||||
- description: CK_SCMI_FLEXGEN_08 flexgen clock 8
|
||||
- description: CK_SCMI_FLEXGEN_09 flexgen clock 9
|
||||
- description: CK_SCMI_FLEXGEN_10 flexgen clock 10
|
||||
- description: CK_SCMI_FLEXGEN_11 flexgen clock 11
|
||||
- description: CK_SCMI_FLEXGEN_12 flexgen clock 12
|
||||
- description: CK_SCMI_FLEXGEN_13 flexgen clock 13
|
||||
- description: CK_SCMI_FLEXGEN_14 flexgen clock 14
|
||||
- description: CK_SCMI_FLEXGEN_15 flexgen clock 15
|
||||
- description: CK_SCMI_FLEXGEN_16 flexgen clock 16
|
||||
- description: CK_SCMI_FLEXGEN_17 flexgen clock 17
|
||||
- description: CK_SCMI_FLEXGEN_18 flexgen clock 18
|
||||
- description: CK_SCMI_FLEXGEN_19 flexgen clock 19
|
||||
- description: CK_SCMI_FLEXGEN_20 flexgen clock 20
|
||||
- description: CK_SCMI_FLEXGEN_21 flexgen clock 21
|
||||
- description: CK_SCMI_FLEXGEN_22 flexgen clock 22
|
||||
- description: CK_SCMI_FLEXGEN_23 flexgen clock 23
|
||||
- description: CK_SCMI_FLEXGEN_24 flexgen clock 24
|
||||
- description: CK_SCMI_FLEXGEN_25 flexgen clock 25
|
||||
- description: CK_SCMI_FLEXGEN_26 flexgen clock 26
|
||||
- description: CK_SCMI_FLEXGEN_27 flexgen clock 27
|
||||
- description: CK_SCMI_FLEXGEN_28 flexgen clock 28
|
||||
- description: CK_SCMI_FLEXGEN_29 flexgen clock 29
|
||||
- description: CK_SCMI_FLEXGEN_30 flexgen clock 30
|
||||
- description: CK_SCMI_FLEXGEN_31 flexgen clock 31
|
||||
- description: CK_SCMI_FLEXGEN_32 flexgen clock 32
|
||||
- description: CK_SCMI_FLEXGEN_33 flexgen clock 33
|
||||
- description: CK_SCMI_FLEXGEN_34 flexgen clock 34
|
||||
- description: CK_SCMI_FLEXGEN_35 flexgen clock 35
|
||||
- description: CK_SCMI_FLEXGEN_36 flexgen clock 36
|
||||
- description: CK_SCMI_FLEXGEN_37 flexgen clock 37
|
||||
- description: CK_SCMI_FLEXGEN_38 flexgen clock 38
|
||||
- description: CK_SCMI_FLEXGEN_39 flexgen clock 39
|
||||
- description: CK_SCMI_FLEXGEN_40 flexgen clock 40
|
||||
- description: CK_SCMI_FLEXGEN_41 flexgen clock 41
|
||||
- description: CK_SCMI_FLEXGEN_42 flexgen clock 42
|
||||
- description: CK_SCMI_FLEXGEN_43 flexgen clock 43
|
||||
- description: CK_SCMI_FLEXGEN_44 flexgen clock 44
|
||||
- description: CK_SCMI_FLEXGEN_45 flexgen clock 45
|
||||
- description: CK_SCMI_FLEXGEN_46 flexgen clock 46
|
||||
- description: CK_SCMI_FLEXGEN_47 flexgen clock 47
|
||||
- description: CK_SCMI_FLEXGEN_48 flexgen clock 48
|
||||
- description: CK_SCMI_FLEXGEN_49 flexgen clock 49
|
||||
- description: CK_SCMI_FLEXGEN_50 flexgen clock 50
|
||||
- description: CK_SCMI_FLEXGEN_51 flexgen clock 51
|
||||
- description: CK_SCMI_FLEXGEN_52 flexgen clock 52
|
||||
- description: CK_SCMI_FLEXGEN_53 flexgen clock 53
|
||||
- description: CK_SCMI_FLEXGEN_54 flexgen clock 54
|
||||
- description: CK_SCMI_FLEXGEN_55 flexgen clock 55
|
||||
- description: CK_SCMI_FLEXGEN_56 flexgen clock 56
|
||||
- description: CK_SCMI_FLEXGEN_57 flexgen clock 57
|
||||
- description: CK_SCMI_FLEXGEN_58 flexgen clock 58
|
||||
- description: CK_SCMI_FLEXGEN_59 flexgen clock 59
|
||||
- description: CK_SCMI_FLEXGEN_60 flexgen clock 60
|
||||
- description: CK_SCMI_FLEXGEN_61 flexgen clock 61
|
||||
- description: CK_SCMI_FLEXGEN_62 flexgen clock 62
|
||||
- description: CK_SCMI_FLEXGEN_63 flexgen clock 63
|
||||
- description: CK_SCMI_ICN_APB1 Peripheral bridge 1
|
||||
- description: CK_SCMI_ICN_APB2 Peripheral bridge 2
|
||||
- description: CK_SCMI_ICN_APB3 Peripheral bridge 3
|
||||
- description: CK_SCMI_ICN_APB4 Peripheral bridge 4
|
||||
- description: CK_SCMI_ICN_APBDBG Peripheral bridge for degub
|
||||
- description: CK_SCMI_TIMG1 Peripheral bridge for timer1
|
||||
- description: CK_SCMI_TIMG2 Peripheral bridge for timer2
|
||||
- description: CK_SCMI_PLL3 PLL3 clock
|
||||
- description: clk_dsi_txbyte DSI byte clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: hse
|
||||
- const: hsi
|
||||
- const: msi
|
||||
- const: lse
|
||||
- const: lsi
|
||||
access-controllers:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
@ -53,7 +124,6 @@ required:
|
|||
- '#clock-cells'
|
||||
- '#reset-cells'
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
@ -66,11 +136,85 @@ examples:
|
|||
reg = <0x44200000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
clock-names = "hse", "hsi", "msi", "lse", "lsi";
|
||||
clocks = <&scmi_clk CK_SCMI_HSE>,
|
||||
<&scmi_clk CK_SCMI_HSI>,
|
||||
<&scmi_clk CK_SCMI_MSI>,
|
||||
<&scmi_clk CK_SCMI_LSE>,
|
||||
<&scmi_clk CK_SCMI_LSI>;
|
||||
clocks = <&scmi_clk CK_SCMI_HSE>,
|
||||
<&scmi_clk CK_SCMI_HSI>,
|
||||
<&scmi_clk CK_SCMI_MSI>,
|
||||
<&scmi_clk CK_SCMI_LSE>,
|
||||
<&scmi_clk CK_SCMI_LSI>,
|
||||
<&scmi_clk CK_SCMI_HSE_DIV2>,
|
||||
<&scmi_clk CK_SCMI_ICN_HS_MCU>,
|
||||
<&scmi_clk CK_SCMI_ICN_LS_MCU>,
|
||||
<&scmi_clk CK_SCMI_ICN_SDMMC>,
|
||||
<&scmi_clk CK_SCMI_ICN_DDR>,
|
||||
<&scmi_clk CK_SCMI_ICN_DISPLAY>,
|
||||
<&scmi_clk CK_SCMI_ICN_HSL>,
|
||||
<&scmi_clk CK_SCMI_ICN_NIC>,
|
||||
<&scmi_clk CK_SCMI_ICN_VID>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_07>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_08>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_09>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_10>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_11>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_12>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_13>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_14>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_15>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_16>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_17>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_18>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_19>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_20>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_21>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_22>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_23>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_24>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_25>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_26>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_27>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_28>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_29>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_30>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_31>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_32>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_33>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_34>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_35>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_36>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_37>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_38>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_39>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_40>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_41>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_42>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_43>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_44>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_45>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_46>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_47>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_48>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_49>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_50>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_51>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_52>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_53>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_54>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_55>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_56>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_57>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_58>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_59>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_60>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_61>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_62>,
|
||||
<&scmi_clk CK_SCMI_FLEXGEN_63>,
|
||||
<&scmi_clk CK_SCMI_ICN_APB1>,
|
||||
<&scmi_clk CK_SCMI_ICN_APB2>,
|
||||
<&scmi_clk CK_SCMI_ICN_APB3>,
|
||||
<&scmi_clk CK_SCMI_ICN_APB4>,
|
||||
<&scmi_clk CK_SCMI_ICN_APBDBG>,
|
||||
<&scmi_clk CK_SCMI_TIMG1>,
|
||||
<&scmi_clk CK_SCMI_TIMG2>,
|
||||
<&scmi_clk CK_SCMI_PLL3>,
|
||||
<&clk_dsi_txbyte>;
|
||||
};
|
||||
...
|
||||
|
|
|
|||
|
|
@ -38,6 +38,7 @@ properties:
|
|||
- qcom,sc7280-cpufreq-epss
|
||||
- qcom,sc8280xp-cpufreq-epss
|
||||
- qcom,sdx75-cpufreq-epss
|
||||
- qcom,sm4450-cpufreq-epss
|
||||
- qcom,sm6375-cpufreq-epss
|
||||
- qcom,sm8250-cpufreq-epss
|
||||
- qcom,sm8350-cpufreq-epss
|
||||
|
|
@ -133,6 +134,7 @@ allOf:
|
|||
- qcom,sc8280xp-cpufreq-epss
|
||||
- qcom,sdm670-cpufreq-hw
|
||||
- qcom,sdm845-cpufreq-hw
|
||||
- qcom,sm4450-cpufreq-epss
|
||||
- qcom,sm6115-cpufreq-hw
|
||||
- qcom,sm6350-cpufreq-hw
|
||||
- qcom,sm6375-cpufreq-epss
|
||||
|
|
|
|||
52
dts/upstream/Bindings/crypto/nvidia,tegra234-se-aes.yaml
Normal file
52
dts/upstream/Bindings/crypto/nvidia,tegra234-se-aes.yaml
Normal file
|
|
@ -0,0 +1,52 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/nvidia,tegra234-se-aes.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra Security Engine for AES algorithms
|
||||
|
||||
description:
|
||||
The Tegra Security Engine accelerates the following AES encryption/decryption
|
||||
algorithms - AES-ECB, AES-CBC, AES-OFB, AES-XTS, AES-CTR, AES-GCM, AES-CCM,
|
||||
AES-CMAC
|
||||
|
||||
maintainers:
|
||||
- Akhil R <akhilrajeev@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra234-se-aes
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- iommus
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/memory/tegra234-mc.h>
|
||||
#include <dt-bindings/clock/tegra234-clock.h>
|
||||
|
||||
crypto@15820000 {
|
||||
compatible = "nvidia,tegra234-se-aes";
|
||||
reg = <0x15820000 0x10000>;
|
||||
clocks = <&bpmp TEGRA234_CLK_SE>;
|
||||
iommus = <&smmu TEGRA234_SID_SES_SE1>;
|
||||
dma-coherent;
|
||||
};
|
||||
...
|
||||
52
dts/upstream/Bindings/crypto/nvidia,tegra234-se-hash.yaml
Normal file
52
dts/upstream/Bindings/crypto/nvidia,tegra234-se-hash.yaml
Normal file
|
|
@ -0,0 +1,52 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/nvidia,tegra234-se-hash.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra Security Engine for HASH algorithms
|
||||
|
||||
description:
|
||||
The Tegra Security HASH Engine accelerates the following HASH functions -
|
||||
SHA1, SHA224, SHA256, SHA384, SHA512, SHA3-224, SHA3-256, SHA3-384, SHA3-512
|
||||
HMAC(SHA224), HMAC(SHA256), HMAC(SHA384), HMAC(SHA512)
|
||||
|
||||
maintainers:
|
||||
- Akhil R <akhilrajeev@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra234-se-hash
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- iommus
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/memory/tegra234-mc.h>
|
||||
#include <dt-bindings/clock/tegra234-clock.h>
|
||||
|
||||
crypto@15840000 {
|
||||
compatible = "nvidia,tegra234-se-hash";
|
||||
reg = <0x15840000 0x10000>;
|
||||
clocks = <&bpmp TEGRA234_CLK_SE>;
|
||||
iommus = <&smmu TEGRA234_SID_SES_SE2>;
|
||||
dma-coherent;
|
||||
};
|
||||
...
|
||||
|
|
@ -1,28 +0,0 @@
|
|||
OMAP SoC SHA crypto Module
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : Should contain entries for this and backward compatible
|
||||
SHAM versions:
|
||||
- "ti,omap2-sham" for OMAP2 & OMAP3.
|
||||
- "ti,omap4-sham" for OMAP4 and AM33XX.
|
||||
- "ti,omap5-sham" for OMAP5, DRA7 and AM43XX.
|
||||
- ti,hwmods: Name of the hwmod associated with the SHAM module
|
||||
- reg : Offset and length of the register set for the module
|
||||
- interrupts : the interrupt-specifier for the SHAM module.
|
||||
|
||||
Optional properties:
|
||||
- dmas: DMA specifiers for the rx dma. See the DMA client binding,
|
||||
Documentation/devicetree/bindings/dma/dma.txt
|
||||
- dma-names: DMA request name. Should be "rx" if a dma is present.
|
||||
|
||||
Example:
|
||||
/* AM335x */
|
||||
sham: sham@53100000 {
|
||||
compatible = "ti,omap4-sham";
|
||||
ti,hwmods = "sham";
|
||||
reg = <0x53100000 0x200>;
|
||||
interrupts = <109>;
|
||||
dmas = <&edma 36>;
|
||||
dma-names = "rx";
|
||||
};
|
||||
|
|
@ -15,6 +15,7 @@ properties:
|
|||
- enum:
|
||||
- qcom,sa8775p-inline-crypto-engine
|
||||
- qcom,sc7180-inline-crypto-engine
|
||||
- qcom,sc7280-inline-crypto-engine
|
||||
- qcom,sm8450-inline-crypto-engine
|
||||
- qcom,sm8550-inline-crypto-engine
|
||||
- qcom,sm8650-inline-crypto-engine
|
||||
|
|
|
|||
|
|
@ -46,6 +46,10 @@ properties:
|
|||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
access-controllers:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -51,6 +51,10 @@ properties:
|
|||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
access-controllers:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -12,7 +12,9 @@ maintainers:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
const: starfive,jh7110-crypto
|
||||
enum:
|
||||
- starfive,jh7110-crypto
|
||||
- starfive,jh8100-crypto
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
@ -28,7 +30,10 @@ properties:
|
|||
- const: ahb
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
minItems: 1
|
||||
items:
|
||||
- description: SHA2 module irq
|
||||
- description: SM3 module irq
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
|
@ -54,6 +59,27 @@ required:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
const: starfive,jh7110-crypto
|
||||
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
const: starfive,jh8100-crypto
|
||||
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 2
|
||||
|
||||
examples:
|
||||
- |
|
||||
crypto: crypto@16000000 {
|
||||
|
|
|
|||
56
dts/upstream/Bindings/crypto/ti,omap-sham.yaml
Normal file
56
dts/upstream/Bindings/crypto/ti,omap-sham.yaml
Normal file
|
|
@ -0,0 +1,56 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/ti,omap-sham.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: OMAP SoC SHA crypto Module
|
||||
|
||||
maintainers:
|
||||
- Animesh Agarwal <animeshagarwal28@gmail.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- ti,omap2-sham
|
||||
- ti,omap4-sham
|
||||
- ti,omap5-sham
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
dmas:
|
||||
maxItems: 1
|
||||
|
||||
dma-names:
|
||||
const: rx
|
||||
|
||||
ti,hwmods:
|
||||
description: Name of the hwmod associated with the SHAM module
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum: [sham]
|
||||
|
||||
dependencies:
|
||||
dmas: [dma-names]
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- ti,hwmods
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
examples:
|
||||
- |
|
||||
sham@53100000 {
|
||||
compatible = "ti,omap4-sham";
|
||||
ti,hwmods = "sham";
|
||||
reg = <0x53100000 0x200>;
|
||||
interrupts = <109>;
|
||||
dmas = <&edma 36>;
|
||||
dma-names = "rx";
|
||||
};
|
||||
103
dts/upstream/Bindings/display/atmel,lcdc-display.yaml
Normal file
103
dts/upstream/Bindings/display/atmel,lcdc-display.yaml
Normal file
|
|
@ -0,0 +1,103 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/atmel,lcdc-display.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip's LCDC Display
|
||||
|
||||
maintainers:
|
||||
- Nicolas Ferre <nicolas.ferre@microchip.com>
|
||||
- Dharma Balasubiramani <dharma.b@microchip.com>
|
||||
|
||||
description:
|
||||
The LCD Controller (LCDC) consists of logic for transferring LCD image data
|
||||
from an external display buffer to a TFT LCD panel. The LCDC has one display
|
||||
input buffer per layer that fetches pixels through the single bus host
|
||||
interface and a look-up table to allow palletized display configurations. The
|
||||
LCDC is programmable on a per layer basis, and supports different LCD
|
||||
resolutions, window sizes, image formats and pixel depths.
|
||||
|
||||
# We need a select here since this schema is applicable only for nodes with the
|
||||
# following properties
|
||||
|
||||
select:
|
||||
anyOf:
|
||||
- required: [ 'atmel,dmacon' ]
|
||||
- required: [ 'atmel,lcdcon2' ]
|
||||
- required: [ 'atmel,guard-time' ]
|
||||
|
||||
properties:
|
||||
atmel,dmacon:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: dma controller configuration
|
||||
|
||||
atmel,lcdcon2:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: lcd controller configuration
|
||||
|
||||
atmel,guard-time:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: lcd guard time (Delay in frame periods)
|
||||
maximum: 127
|
||||
|
||||
bits-per-pixel:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: lcd panel bit-depth.
|
||||
enum: [1, 2, 4, 8, 16, 24, 32]
|
||||
|
||||
atmel,lcdcon-backlight:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: enable backlight
|
||||
|
||||
atmel,lcdcon-backlight-inverted:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description: invert backlight PWM polarity
|
||||
|
||||
atmel,lcd-wiring-mode:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
description: lcd wiring mode "RGB" or "BRG"
|
||||
enum:
|
||||
- RGB
|
||||
- BRG
|
||||
|
||||
atmel,power-control-gpio:
|
||||
description: gpio to power on or off the LCD (as many as needed)
|
||||
maxItems: 1
|
||||
|
||||
display-timings:
|
||||
$ref: panel/display-timings.yaml#
|
||||
|
||||
required:
|
||||
- atmel,dmacon
|
||||
- atmel,lcdcon2
|
||||
- atmel,guard-time
|
||||
- bits-per-pixel
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
display: panel {
|
||||
bits-per-pixel = <32>;
|
||||
atmel,lcdcon-backlight;
|
||||
atmel,dmacon = <0x1>;
|
||||
atmel,lcdcon2 = <0x80008002>;
|
||||
atmel,guard-time = <9>;
|
||||
atmel,lcd-wiring-mode = "RGB";
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: timing0 {
|
||||
clock-frequency = <9000000>;
|
||||
hactive = <480>;
|
||||
vactive = <272>;
|
||||
hback-porch = <1>;
|
||||
hfront-porch = <1>;
|
||||
vback-porch = <40>;
|
||||
vfront-porch = <1>;
|
||||
hsync-len = <45>;
|
||||
vsync-len = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,87 +0,0 @@
|
|||
Atmel LCDC Framebuffer
|
||||
-----------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible :
|
||||
"atmel,at91sam9261-lcdc" ,
|
||||
"atmel,at91sam9263-lcdc" ,
|
||||
"atmel,at91sam9g10-lcdc" ,
|
||||
"atmel,at91sam9g45-lcdc" ,
|
||||
"atmel,at91sam9g45es-lcdc" ,
|
||||
"atmel,at91sam9rl-lcdc" ,
|
||||
- reg : Should contain 1 register ranges(address and length).
|
||||
Can contain an additional register range(address and length)
|
||||
for fixed framebuffer memory. Useful for dedicated memories.
|
||||
- interrupts : framebuffer controller interrupt
|
||||
- display: a phandle pointing to the display node
|
||||
|
||||
Required nodes:
|
||||
- display: a display node is required to initialize the lcd panel
|
||||
This should be in the board dts.
|
||||
- default-mode: a videomode within the display with timing parameters
|
||||
as specified below.
|
||||
|
||||
Optional properties:
|
||||
- lcd-supply: Regulator for LCD supply voltage.
|
||||
|
||||
Example:
|
||||
|
||||
fb0: fb@00500000 {
|
||||
compatible = "atmel,at91sam9g45-lcdc";
|
||||
reg = <0x00500000 0x1000>;
|
||||
interrupts = <23 3 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fb>;
|
||||
display = <&display0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
};
|
||||
|
||||
Example for fixed framebuffer memory:
|
||||
|
||||
fb0: fb@00500000 {
|
||||
compatible = "atmel,at91sam9263-lcdc";
|
||||
reg = <0x00700000 0x1000 0x70000000 0x200000>;
|
||||
[...]
|
||||
};
|
||||
|
||||
Atmel LCDC Display
|
||||
-----------------------------------------------------
|
||||
Required properties (as per of_videomode_helper):
|
||||
|
||||
- atmel,dmacon: dma controller configuration
|
||||
- atmel,lcdcon2: lcd controller configuration
|
||||
- atmel,guard-time: lcd guard time (Delay in frame periods)
|
||||
- bits-per-pixel: lcd panel bit-depth.
|
||||
|
||||
Optional properties (as per of_videomode_helper):
|
||||
- atmel,lcdcon-backlight: enable backlight
|
||||
- atmel,lcdcon-backlight-inverted: invert backlight PWM polarity
|
||||
- atmel,lcd-wiring-mode: lcd wiring mode "RGB" or "BRG"
|
||||
- atmel,power-control-gpio: gpio to power on or off the LCD (as many as needed)
|
||||
|
||||
Example:
|
||||
display0: display {
|
||||
bits-per-pixel = <32>;
|
||||
atmel,lcdcon-backlight;
|
||||
atmel,dmacon = <0x1>;
|
||||
atmel,lcdcon2 = <0x80008002>;
|
||||
atmel,guard-time = <9>;
|
||||
atmel,lcd-wiring-mode = <1>;
|
||||
|
||||
display-timings {
|
||||
native-mode = <&timing0>;
|
||||
timing0: timing0 {
|
||||
clock-frequency = <9000000>;
|
||||
hactive = <480>;
|
||||
vactive = <272>;
|
||||
hback-porch = <1>;
|
||||
hfront-porch = <1>;
|
||||
vback-porch = <40>;
|
||||
vfront-porch = <1>;
|
||||
hsync-len = <45>;
|
||||
vsync-len = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
70
dts/upstream/Bindings/display/atmel,lcdc.yaml
Normal file
70
dts/upstream/Bindings/display/atmel,lcdc.yaml
Normal file
|
|
@ -0,0 +1,70 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/atmel,lcdc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip's LCDC Framebuffer
|
||||
|
||||
maintainers:
|
||||
- Nicolas Ferre <nicolas.ferre@microchip.com>
|
||||
- Dharma Balasubiramani <dharma.b@microchip.com>
|
||||
|
||||
description:
|
||||
The LCDC works with a framebuffer, which is a section of memory that contains
|
||||
a complete frame of data representing pixel values for the display. The LCDC
|
||||
reads the pixel data from the framebuffer and sends it to the LCD panel to
|
||||
render the image.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- atmel,at91sam9261-lcdc
|
||||
- atmel,at91sam9263-lcdc
|
||||
- atmel,at91sam9g10-lcdc
|
||||
- atmel,at91sam9g45-lcdc
|
||||
- atmel,at91sam9g45es-lcdc
|
||||
- atmel,at91sam9rl-lcdc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: hclk
|
||||
- const: lcdc_clk
|
||||
|
||||
display:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: A phandle pointing to the display node.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- display
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
fb@500000 {
|
||||
compatible = "atmel,at91sam9g45-lcdc";
|
||||
reg = <0x00500000 0x1000>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_fb>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
|
||||
clock-names = "hclk", "lcdc_clk";
|
||||
display = <&display>;
|
||||
};
|
||||
|
|
@ -9,6 +9,9 @@ title: ITE it6505
|
|||
maintainers:
|
||||
- Allen Chen <allen.chen@ite.com.tw>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/sound/dai-common.yaml#
|
||||
|
||||
description: |
|
||||
The IT6505 is a high-performance DisplayPort 1.1a transmitter,
|
||||
fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications.
|
||||
|
|
@ -52,6 +55,9 @@ properties:
|
|||
maxItems: 1
|
||||
description: extcon specifier for the Power Delivery
|
||||
|
||||
"#sound-dai-cells":
|
||||
const: 0
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
|
|
@ -105,7 +111,7 @@ required:
|
|||
- extcon
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@ properties:
|
|||
- enum:
|
||||
- ti,ds90cf364a # For the DS90CF364A FPD-Link LVDS Receiver
|
||||
- ti,ds90cf384a # For the DS90CF384A FPD-Link LVDS Receiver
|
||||
- ti,sn65lvds94 # For the SN65DS94 LVDS serdes
|
||||
- const: lvds-decoder # Generic LVDS decoders compatible fallback
|
||||
- enum:
|
||||
- thine,thc63lvdm83d # For the THC63LVDM83D LVDS serializer
|
||||
|
|
|
|||
|
|
@ -0,0 +1,55 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/bridge/microchip,sam9x75-lvds.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip SAM9X75 LVDS Controller
|
||||
|
||||
maintainers:
|
||||
- Dharma Balasubiramani <dharma.b@microchip.com>
|
||||
|
||||
description:
|
||||
The Low Voltage Differential Signaling Controller (LVDSC) manages data
|
||||
format conversion from the LCD Controller internal DPI bus to OpenLDI
|
||||
LVDS output signals. LVDSC functions include bit mapping, balanced mode
|
||||
management, and serializer.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: microchip,sam9x75-lvds
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Peripheral Bus Clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: pclk
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/clock/at91.h>
|
||||
lvds-controller@f8060000 {
|
||||
compatible = "microchip,sam9x75-lvds";
|
||||
reg = <0xf8060000 0x100>;
|
||||
interrupts = <56 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 56>;
|
||||
clock-names = "pclk";
|
||||
};
|
||||
|
|
@ -10,7 +10,7 @@ maintainers:
|
|||
- Vinay Simha BN <simhavcs@gmail.com>
|
||||
|
||||
description: |
|
||||
This binding supports DSI to LVDS bridge TC358775
|
||||
This binding supports DSI to LVDS bridges TC358765 and TC358775
|
||||
|
||||
MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
|
||||
Video frame size:
|
||||
|
|
@ -21,7 +21,9 @@ description: |
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
const: toshiba,tc358775
|
||||
enum:
|
||||
- toshiba,tc358765
|
||||
- toshiba,tc358775
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
@ -46,11 +48,27 @@ properties:
|
|||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: |
|
||||
DSI Input. The remote endpoint phandle should be a
|
||||
reference to a valid mipi_dsi_host device node.
|
||||
|
||||
properties:
|
||||
endpoint:
|
||||
$ref: /schemas/media/video-interfaces.yaml#
|
||||
unevaluatedProperties: false
|
||||
|
||||
properties:
|
||||
data-lanes:
|
||||
description: array of physical DSI data lane indexes.
|
||||
minItems: 1
|
||||
items:
|
||||
- const: 1
|
||||
- const: 2
|
||||
- const: 3
|
||||
- const: 4
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: |
|
||||
|
|
@ -70,10 +88,19 @@ required:
|
|||
- reg
|
||||
- vdd-supply
|
||||
- vddio-supply
|
||||
- stby-gpios
|
||||
- reset-gpios
|
||||
- ports
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: toshiba,tc358765
|
||||
then:
|
||||
properties:
|
||||
stby-gpios: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
@ -108,6 +135,7 @@ examples:
|
|||
reg = <0>;
|
||||
d2l_in_test: endpoint {
|
||||
remote-endpoint = <&dsi0_out>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -132,7 +160,6 @@ examples:
|
|||
reg = <1>;
|
||||
dsi0_out: endpoint {
|
||||
remote-endpoint = <&d2l_in_test>;
|
||||
data-lanes = <0 1 2 3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -167,6 +194,7 @@ examples:
|
|||
reg = <0>;
|
||||
d2l_in_dual: endpoint {
|
||||
remote-endpoint = <&dsi0_out_dual>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -198,7 +226,6 @@ examples:
|
|||
reg = <1>;
|
||||
dsi0_out_dual: endpoint {
|
||||
remote-endpoint = <&d2l_in_dual>;
|
||||
data-lanes = <0 1 2 3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,112 +0,0 @@
|
|||
The Exynos display port interface should be configured based on
|
||||
the type of panel connected to it.
|
||||
|
||||
We use two nodes:
|
||||
-dp-controller node
|
||||
-dptx-phy node(defined inside dp-controller node)
|
||||
|
||||
For the DP-PHY initialization, we use the dptx-phy node.
|
||||
Required properties for dptx-phy: deprecated, use phys and phy-names
|
||||
-reg: deprecated
|
||||
Base address of DP PHY register.
|
||||
-samsung,enable-mask: deprecated
|
||||
The bit-mask used to enable/disable DP PHY.
|
||||
|
||||
For the Panel initialization, we read data from dp-controller node.
|
||||
Required properties for dp-controller:
|
||||
-compatible:
|
||||
should be "samsung,exynos5-dp".
|
||||
-reg:
|
||||
physical base address of the controller and length
|
||||
of memory mapped region.
|
||||
-interrupts:
|
||||
interrupt combiner values.
|
||||
-clocks:
|
||||
from common clock binding: handle to dp clock.
|
||||
-clock-names:
|
||||
from common clock binding: Shall be "dp".
|
||||
-phys:
|
||||
from general PHY binding: the phandle for the PHY device.
|
||||
-phy-names:
|
||||
from general PHY binding: Should be "dp".
|
||||
|
||||
Optional properties for dp-controller:
|
||||
-interlaced:
|
||||
interlace scan mode.
|
||||
Progressive if defined, Interlaced if not defined
|
||||
-vsync-active-high:
|
||||
VSYNC polarity configuration.
|
||||
High if defined, Low if not defined
|
||||
-hsync-active-high:
|
||||
HSYNC polarity configuration.
|
||||
High if defined, Low if not defined
|
||||
-samsung,hpd-gpio:
|
||||
Hotplug detect GPIO.
|
||||
Indicates which GPIO should be used for hotplug
|
||||
detection
|
||||
-video interfaces: Device node can contain video interface port
|
||||
nodes according to [1].
|
||||
- display-timings: timings for the connected panel as described by
|
||||
Documentation/devicetree/bindings/display/panel/display-timing.txt
|
||||
|
||||
For the below properties, please refer to Analogix DP binding document:
|
||||
* Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml
|
||||
-phys (required)
|
||||
-phy-names (required)
|
||||
-hpd-gpios (optional)
|
||||
force-hpd (optional)
|
||||
|
||||
Deprecated properties for DisplayPort:
|
||||
-interlaced: deprecated prop that can parsed from drm_display_mode.
|
||||
-vsync-active-high: deprecated prop that can parsed from drm_display_mode.
|
||||
-hsync-active-high: deprecated prop that can parsed from drm_display_mode.
|
||||
-samsung,ycbcr-coeff: deprecated prop that can parsed from drm_display_mode.
|
||||
-samsung,dynamic-range: deprecated prop that can parsed from drm_display_mode.
|
||||
-samsung,color-space: deprecated prop that can parsed from drm_display_info.
|
||||
-samsung,color-depth: deprecated prop that can parsed from drm_display_info.
|
||||
-samsung,link-rate: deprecated prop that can reading from monitor by dpcd method.
|
||||
-samsung,lane-count: deprecated prop that can reading from monitor by dpcd method.
|
||||
-samsung,hpd-gpio: deprecated name for hpd-gpios.
|
||||
|
||||
-------------------------------------------------------------------------------
|
||||
|
||||
Example:
|
||||
|
||||
SOC specific portion:
|
||||
dp-controller {
|
||||
compatible = "samsung,exynos5-dp";
|
||||
reg = <0x145b0000 0x10000>;
|
||||
interrupts = <10 3>;
|
||||
interrupt-parent = <&combiner>;
|
||||
clocks = <&clock 342>;
|
||||
clock-names = "dp";
|
||||
|
||||
phys = <&dp_phy>;
|
||||
phy-names = "dp";
|
||||
};
|
||||
|
||||
Board Specific portion:
|
||||
dp-controller {
|
||||
display-timings {
|
||||
native-mode = <&lcd_timing>;
|
||||
lcd_timing: 1366x768 {
|
||||
clock-frequency = <70589280>;
|
||||
hactive = <1366>;
|
||||
vactive = <768>;
|
||||
hfront-porch = <40>;
|
||||
hback-porch = <40>;
|
||||
hsync-len = <32>;
|
||||
vback-porch = <10>;
|
||||
vfront-porch = <12>;
|
||||
vsync-len = <6>;
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
port@0 {
|
||||
dp_out: endpoint {
|
||||
remote-endpoint = <&bridge_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -24,6 +24,7 @@ properties:
|
|||
- enum:
|
||||
- mediatek,mt8173-disp-gamma
|
||||
- mediatek,mt8183-disp-gamma
|
||||
- mediatek,mt8195-disp-gamma
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt6795-disp-gamma
|
||||
|
|
@ -35,6 +36,10 @@ properties:
|
|||
- mediatek,mt8192-disp-gamma
|
||||
- mediatek,mt8195-disp-gamma
|
||||
- const: mediatek,mt8183-disp-gamma
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8188-disp-gamma
|
||||
- const: mediatek,mt8195-disp-gamma
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -29,6 +29,7 @@ properties:
|
|||
- qcom,sm8650-dp
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sm6350-dp
|
||||
- qcom,sm8150-dp
|
||||
- qcom,sm8250-dp
|
||||
- qcom,sm8450-dp
|
||||
|
|
|
|||
|
|
@ -53,6 +53,15 @@ patternProperties:
|
|||
compatible:
|
||||
const: qcom,sm6350-dpu
|
||||
|
||||
"^displayport-controller@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: true
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: qcom,sm6350-dp
|
||||
|
||||
"^dsi@[0-9a-f]+$":
|
||||
type: object
|
||||
additionalProperties: true
|
||||
|
|
|
|||
|
|
@ -17,10 +17,12 @@ properties:
|
|||
compatible:
|
||||
const: abt,y030xx067a
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
port: true
|
||||
power-supply: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -21,7 +21,10 @@ allOf:
|
|||
properties:
|
||||
compatible:
|
||||
const: asus,z00t-tm5p5-n35596
|
||||
reg: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios: true
|
||||
vdd-supply:
|
||||
description: core voltage supply
|
||||
|
|
|
|||
|
|
@ -26,6 +26,9 @@ properties:
|
|||
compatible:
|
||||
const: boe,bf060y8m-aj0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
elvdd-supply:
|
||||
description: EL Driving positive (VDD) supply (4.40-4.80V)
|
||||
elvss-supply:
|
||||
|
|
@ -38,7 +41,6 @@ properties:
|
|||
description: I/O voltage supply (1.62-1.98V)
|
||||
|
||||
port: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -18,9 +18,11 @@ properties:
|
|||
- const: boe,himax8279d8p
|
||||
- const: boe,himax8279d10p
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
reg: true
|
||||
|
||||
pp33-gpios:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -18,7 +18,9 @@ properties:
|
|||
# BOE TH101MB31IG002-28A 10.1" WXGA TFT LCD panel
|
||||
- boe,th101mb31ig002-28a
|
||||
|
||||
reg: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
power-supply: true
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@ properties:
|
|||
- starry,ili9882t
|
||||
|
||||
reg:
|
||||
description: the virtual channel number of a DSI peripheral
|
||||
maxItems: 1
|
||||
|
||||
enable-gpios:
|
||||
description: a GPIO spec for the enable pin
|
||||
|
|
|
|||
|
|
@ -15,7 +15,10 @@ allOf:
|
|||
properties:
|
||||
compatible:
|
||||
const: elida,kd35t133
|
||||
reg: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
port: true
|
||||
reset-gpios: true
|
||||
|
|
|
|||
|
|
@ -17,6 +17,9 @@ properties:
|
|||
compatible:
|
||||
const: fascontek,fs035vg158
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-3wire: true
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -15,7 +15,10 @@ allOf:
|
|||
properties:
|
||||
compatible:
|
||||
const: feixin,k101-im2ba02
|
||||
reg: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
reset-gpios: true
|
||||
avdd-supply:
|
||||
|
|
|
|||
|
|
@ -21,6 +21,9 @@ properties:
|
|||
contains:
|
||||
const: djn,9a-3r063-1102b
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vdd1-supply:
|
||||
description: Digital voltage rail
|
||||
|
||||
|
|
@ -30,7 +33,6 @@ properties:
|
|||
vsp-supply:
|
||||
description: Negative source voltage rail
|
||||
|
||||
reg: true
|
||||
port: true
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -26,7 +26,8 @@ properties:
|
|||
- powkiddy,x55-panel
|
||||
- const: himax,hx8394
|
||||
|
||||
reg: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios: true
|
||||
|
||||
|
|
|
|||
|
|
@ -24,6 +24,9 @@ properties:
|
|||
- newhaven,1.8-128160EF
|
||||
- const: ilitek,ili9163
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 32000000
|
||||
|
||||
|
|
@ -32,7 +35,6 @@ properties:
|
|||
description: Display data/command selection (D/CX)
|
||||
|
||||
backlight: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
rotation: true
|
||||
|
||||
|
|
|
|||
|
|
@ -26,6 +26,9 @@ properties:
|
|||
- dlink,dir-685-panel
|
||||
- const: ilitek,ili9322
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios: true
|
||||
port: true
|
||||
|
||||
|
|
|
|||
|
|
@ -28,7 +28,8 @@ properties:
|
|||
- canaan,kd233-tft
|
||||
- const: ilitek,ili9341
|
||||
|
||||
reg: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
dc-gpios:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -20,9 +20,11 @@ properties:
|
|||
- tianma,tm041xdhg01
|
||||
- const: ilitek,ili9805
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
avdd-supply: true
|
||||
dvdd-supply: true
|
||||
reg: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -19,13 +19,16 @@ properties:
|
|||
- ampire,am8001280g
|
||||
- bananapi,lhr050h41
|
||||
- feixin,k101-im2byl02
|
||||
- startek,kd050hdfia020
|
||||
- tdo,tl050hdv35
|
||||
- wanchanglong,w552946aba
|
||||
- const: ilitek,ili9881c
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
power-supply: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
rotation: true
|
||||
|
||||
|
|
|
|||
|
|
@ -17,10 +17,12 @@ properties:
|
|||
compatible:
|
||||
const: innolux,ej030na
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
port: true
|
||||
power-supply: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -16,9 +16,11 @@ properties:
|
|||
compatible:
|
||||
const: innolux,p097pfg
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
reg: true
|
||||
|
||||
avdd-supply:
|
||||
description: The regulator that provides positive voltage
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@ properties:
|
|||
- radxa,display-8hd-ad002
|
||||
- const: jadard,jd9365da-h3
|
||||
|
||||
reg: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
vdd-supply:
|
||||
description: supply regulator for VDD, usually 3.3V
|
||||
|
|
|
|||
|
|
@ -26,7 +26,9 @@ properties:
|
|||
compatible:
|
||||
const: jdi,lpm102a188a
|
||||
|
||||
reg: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
enable-gpios: true
|
||||
reset-gpios: true
|
||||
power-supply: true
|
||||
|
|
|
|||
|
|
@ -16,8 +16,10 @@ properties:
|
|||
compatible:
|
||||
const: jdi,lt070me05000
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
enable-gpios: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
vddp-supply:
|
||||
|
|
|
|||
|
|
@ -17,10 +17,12 @@ properties:
|
|||
compatible:
|
||||
const: kingdisplay,kd035g6-54nt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
port: true
|
||||
power-supply: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
spi-3wire: true
|
||||
|
|
|
|||
|
|
@ -18,6 +18,9 @@ properties:
|
|||
compatible:
|
||||
const: leadtek,ltk035c5444t
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-3wire: true
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -18,7 +18,10 @@ properties:
|
|||
- leadtek,ltk050h3146w
|
||||
- leadtek,ltk050h3146w-a2
|
||||
- leadtek,ltk050h3148w
|
||||
reg: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
reset-gpios: true
|
||||
iovcc-supply:
|
||||
|
|
|
|||
|
|
@ -17,7 +17,10 @@ properties:
|
|||
enum:
|
||||
- leadtek,ltk101b4029w
|
||||
- leadtek,ltk500hd1829
|
||||
reg: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
reset-gpios: true
|
||||
iovcc-supply:
|
||||
|
|
|
|||
|
|
@ -21,7 +21,8 @@ properties:
|
|||
compatible:
|
||||
const: lg,lg4573
|
||||
|
||||
reg: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
62
dts/upstream/Bindings/display/panel/lg,sw43408.yaml
Normal file
62
dts/upstream/Bindings/display/panel/lg,sw43408.yaml
Normal file
|
|
@ -0,0 +1,62 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: LG SW43408 1080x2160 DSI panel
|
||||
|
||||
maintainers:
|
||||
- Caleb Connolly <caleb.connolly@linaro.org>
|
||||
|
||||
description:
|
||||
This panel is used on the Pixel 3, it is a 60hz OLED panel which
|
||||
required DSC (Display Stream Compression) and has rounded corners.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: lg,sw43408
|
||||
|
||||
reg: true
|
||||
port: true
|
||||
vddi-supply: true
|
||||
vpnl-supply: true
|
||||
reset-gpios: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- vddi-supply
|
||||
- vpnl-supply
|
||||
- reset-gpios
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "lg,sw43408";
|
||||
reg = <0>;
|
||||
|
||||
vddi-supply = <&vreg_l14a_1p88>;
|
||||
vpnl-supply = <&vreg_l28a_3p0>;
|
||||
|
||||
reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
endpoint {
|
||||
remote-endpoint = <&mdss_dsi0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -17,6 +17,9 @@ properties:
|
|||
compatible:
|
||||
const: lgphilips,lb035q02
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
label: true
|
||||
enable-gpios: true
|
||||
port: true
|
||||
|
|
|
|||
|
|
@ -21,9 +21,11 @@ properties:
|
|||
compatible:
|
||||
const: nec,nl8048hl11
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
label: true
|
||||
port: true
|
||||
reg: true
|
||||
reset-gpios: true
|
||||
|
||||
spi-max-frequency:
|
||||
|
|
|
|||
|
|
@ -24,7 +24,9 @@ properties:
|
|||
- powkiddy,rk2023-panel
|
||||
- const: newvision,nv3051d
|
||||
|
||||
reg: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
port: true
|
||||
reset-gpios:
|
||||
|
|
|
|||
|
|
@ -24,7 +24,10 @@ properties:
|
|||
string determines how the NT35510 panel driver shall be configured
|
||||
to work with the indicated panel. The novatek,nt35510 compatible shall
|
||||
always be provided as a fallback.
|
||||
reg: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios: true
|
||||
vdd-supply:
|
||||
description: regulator that supplies the vdd voltage
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ description: |
|
|||
either bilinear interpolation or pixel duplication.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
- $ref: panel-common-dual.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -33,6 +33,9 @@ properties:
|
|||
to work with the indicated panel. The novatek,nt35950 compatible shall
|
||||
always be provided as a fallback.
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: phandle of gpio for reset line - This should be 8mA, gpio
|
||||
|
|
@ -49,7 +52,6 @@ properties:
|
|||
|
||||
backlight: true
|
||||
ports: true
|
||||
reg: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
@ -59,6 +61,7 @@ required:
|
|||
- avee-supply
|
||||
- dvdd-supply
|
||||
- vddio-supply
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -14,9 +14,6 @@ description: |
|
|||
panels. Support video mode panels from China Star Optoelectronics
|
||||
Technology (CSOT) and BOE Technology.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
|
|
@ -30,6 +27,9 @@ properties:
|
|||
- lenovo,j606f-boe-nt36523w
|
||||
- const: novatek,nt36523w
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: phandle of gpio for reset line - This should be 8mA
|
||||
|
|
@ -37,8 +37,6 @@ properties:
|
|||
vddio-supply:
|
||||
description: regulator that supplies the I/O voltage
|
||||
|
||||
reg: true
|
||||
ports: true
|
||||
rotation: true
|
||||
backlight: true
|
||||
|
||||
|
|
@ -47,7 +45,26 @@ required:
|
|||
- reg
|
||||
- vddio-supply
|
||||
- reset-gpios
|
||||
- ports
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common-dual.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- novatek,nt36523w
|
||||
then:
|
||||
properties:
|
||||
ports:
|
||||
properties:
|
||||
port@1: false
|
||||
else:
|
||||
properties:
|
||||
port: false
|
||||
ports:
|
||||
required:
|
||||
- port@1
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -29,6 +29,9 @@ properties:
|
|||
determines how the NT36672A panel driver is configured for the indicated
|
||||
panel. The novatek,nt36672a compatible shall always be provided as a fallback.
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: phandle of gpio for reset line - This should be 8mA, gpio
|
||||
|
|
@ -44,7 +47,6 @@ properties:
|
|||
vddneg-supply:
|
||||
description: phandle of the negative boost supply regulator
|
||||
|
||||
reg: true
|
||||
port: true
|
||||
backlight: true
|
||||
|
||||
|
|
|
|||
|
|
@ -38,10 +38,12 @@ properties:
|
|||
compatible:
|
||||
const: olimex,lcd-olinuxino
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
backlight: true
|
||||
enable-gpios: true
|
||||
power-supply: true
|
||||
reg: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
47
dts/upstream/Bindings/display/panel/panel-common-dual.yaml
Normal file
47
dts/upstream/Bindings/display/panel/panel-common-dual.yaml
Normal file
|
|
@ -0,0 +1,47 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/panel-common-dual.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Common Properties for Dual-Link Display Panels
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
|
||||
|
||||
description:
|
||||
Properties common for Panel IC supporting dual link panels. Devices might
|
||||
support also single link.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common.yaml#
|
||||
|
||||
properties:
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: First link
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description: Second link
|
||||
|
||||
"#address-cells": true
|
||||
"#size-cells": true
|
||||
|
||||
required:
|
||||
- port@0
|
||||
|
||||
# Single-panel setups are still allowed.
|
||||
oneOf:
|
||||
- required:
|
||||
- ports
|
||||
- required:
|
||||
- port
|
||||
|
||||
additionalProperties: true
|
||||
|
|
@ -71,6 +71,9 @@ properties:
|
|||
- shineworld,lh133k
|
||||
- const: panel-mipi-dbi-spi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
write-only:
|
||||
type: boolean
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -36,6 +36,8 @@ properties:
|
|||
- jdi,fhd-r63452
|
||||
# Khadas TS050 5" 1080x1920 LCD panel
|
||||
- khadas,ts050
|
||||
# Khadas TS050 V2 5" 1080x1920 LCD panel
|
||||
- khadas,ts050v2
|
||||
# Kingdisplay KD097D04 9.7" 1536x2048 TFT LCD panel
|
||||
- kingdisplay,kd097d04
|
||||
# LG ACX467AKM-7 4.95" 1080×1920 LCD Panel
|
||||
|
|
@ -50,6 +52,8 @@ properties:
|
|||
- panasonic,vvx10f004b00
|
||||
# Panasonic 10" WUXGA TFT LCD panel
|
||||
- panasonic,vvx10f034n00
|
||||
# Samsung s6e3fa7 1080x2220 based AMS559NK06 AMOLED panel
|
||||
- samsung,s6e3fa7-ams559nk06
|
||||
# Samsung s6e3fc2x01 1080x2340 AMOLED panel
|
||||
- samsung,s6e3fc2x01
|
||||
# Samsung sofef00 1080x2280 AMOLED panel
|
||||
|
|
|
|||
|
|
@ -91,6 +91,8 @@ properties:
|
|||
- boe,nv133fhm-n62
|
||||
# BOE NV140FHM-N49 14.0" FHD a-Si FT panel
|
||||
- boe,nv140fhmn49
|
||||
# Crystal Clear Technology CMT430B19N00 4.3" 480x272 TFT-LCD panel
|
||||
- cct,cmt430b19n00
|
||||
# CDTech(H.K.) Electronics Limited 4.3" 480x272 color TFT-LCD panel
|
||||
- cdtech,s043wq26h-ct7
|
||||
# CDTech(H.K.) Electronics Limited 7" WSVGA (1024x600) TFT LCD Panel
|
||||
|
|
@ -188,6 +190,8 @@ properties:
|
|||
- innolux,g121i1-l01
|
||||
# Innolux Corporation 12.1" G121X1-L03 XGA (1024x768) TFT LCD panel
|
||||
- innolux,g121x1-l03
|
||||
# Innolux Corporation 12.1" G121XCE-L01 XGA (1024x768) TFT LCD panel
|
||||
- innolux,g121xce-l01
|
||||
# Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel
|
||||
- innolux,n116bca-ea1
|
||||
# Innolux Corporation 11.6" WXGA (1366x768) TFT LCD panel
|
||||
|
|
@ -272,6 +276,8 @@ properties:
|
|||
- osddisplays,osd070t1718-19ts
|
||||
# One Stop Displays OSD101T2045-53TS 10.1" 1920x1200 panel
|
||||
- osddisplays,osd101t2045-53ts
|
||||
# POWERTIP PH128800T006-ZHC01 10.1" WXGA TFT LCD panel
|
||||
- powertip,ph128800t006-zhc01
|
||||
# POWERTIP PH800480T013-IDF2 7.0" WVGA TFT LCD panel
|
||||
- powertip,ph800480t013-idf02
|
||||
# QiaoDian XianShi Corporation 4"3 TFT LCD panel
|
||||
|
|
@ -348,15 +354,6 @@ properties:
|
|||
# Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel
|
||||
- yes-optoelectronics,ytc700tlag-05-201c
|
||||
|
||||
backlight: true
|
||||
ddc-i2c-bus: true
|
||||
enable-gpios: true
|
||||
port: true
|
||||
power-supply: true
|
||||
no-hpd: true
|
||||
hpd-gpios: true
|
||||
data-mapping: true
|
||||
|
||||
if:
|
||||
not:
|
||||
properties:
|
||||
|
|
@ -367,7 +364,7 @@ then:
|
|||
properties:
|
||||
data-mapping: false
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -16,7 +16,9 @@ properties:
|
|||
compatible:
|
||||
const: raydium,rm67191
|
||||
|
||||
reg: true
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
port: true
|
||||
reset-gpios: true
|
||||
width-mm: true
|
||||
|
|
|
|||
|
|
@ -22,6 +22,9 @@ properties:
|
|||
- const: fairphone,fp5-rm692e5-boe
|
||||
- const: raydium,rm692e5
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
dvdd-supply:
|
||||
description: Digital voltage rail
|
||||
|
||||
|
|
@ -31,7 +34,6 @@ properties:
|
|||
vddio-supply:
|
||||
description: I/O voltage rail
|
||||
|
||||
reg: true
|
||||
port: true
|
||||
|
||||
required:
|
||||
|
|
|
|||
89
dts/upstream/Bindings/display/panel/raydium,rm69380.yaml
Normal file
89
dts/upstream/Bindings/display/panel/raydium,rm69380.yaml
Normal file
|
|
@ -0,0 +1,89 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/panel/raydium,rm69380.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Raydium RM69380-based DSI display panels
|
||||
|
||||
maintainers:
|
||||
- David Wronek <david@mainlining.org>
|
||||
|
||||
description:
|
||||
The Raydium RM69380 is a generic DSI panel IC used to control
|
||||
OLED panels.
|
||||
|
||||
allOf:
|
||||
- $ref: panel-common-dual.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- lenovo,j716f-edo-rm69380
|
||||
- const: raydium,rm69380
|
||||
description: This indicates the panel manufacturer of the panel
|
||||
that is in turn using the RM69380 panel driver. The compatible
|
||||
string determines how the RM69380 panel driver shall be configured
|
||||
to work with the indicated panel. The raydium,rm69380 compatible shall
|
||||
always be provided as a fallback.
|
||||
|
||||
avdd-supply:
|
||||
description: Analog voltage rail
|
||||
|
||||
vddio-supply:
|
||||
description: I/O voltage rail
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
description: phandle of gpio for reset line - This should be active low
|
||||
|
||||
reg: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
- vddio-supply
|
||||
- reset-gpios
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "lenovo,j716f-edo-rm69380", "raydium,rm69380";
|
||||
reg = <0>;
|
||||
|
||||
avdd-supply = <&panel_avdd_regulator>;
|
||||
vddio-supply = <&vreg_l14a>;
|
||||
reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
panel_in_0: endpoint {
|
||||
remote-endpoint = <&mdss_dsi0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
panel_in_1: endpoint {
|
||||
remote-endpoint = <&mdss_dsi1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -22,6 +22,8 @@ properties:
|
|||
enum:
|
||||
# Anberic RG353V-V2 5.0" 640x480 TFT LCD panel
|
||||
- anbernic,rg353v-panel-v2
|
||||
# GameForce Chi 3.5" 640x480 TFT LCD panel
|
||||
- gameforce,chi-panel
|
||||
# Powkiddy RGB10MAX3 5.0" 720x1280 TFT LCD panel
|
||||
- powkiddy,rgb10max3-panel
|
||||
# Powkiddy RGB30 3.0" 720x720 TFT LCD panel
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Reference in a new issue