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mtd: spi-nor-core: Parse xSPI Profile 1.0 table

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This table is indication that the flash is xSPI compliant and hence
supports octal DTR mode. Extract information like the fast read opcode,
the number of dummy cycles needed for a Read Status Register command,
and the number of address bytes needed for a Read Status Register
command.

The default dummy cycles for a fast octal DTR read are set to 20. Since
there is no simple way of determining the dummy cycles needed for the
fast read command, flashes that use a different value should update it
in their flash-specific hooks.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Pratyush Yadav 2021-06-26 00:47:19 +05:30 • committed by Jagan Teki
parent 9ec5ea0127
commit 4d40e82663
2 changed files with 107 additions and 0 deletions
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7
include/linux/mtd/spi-nor.h
View file

@ -391,6 +391,8 @@ enum spi_nor_pp_command_index {
struct spi_nor_flash_parameter {
u64 size;
u32 page_size;
u8 rdsr_dummy;
u8 rdsr_addr_nbytes;
struct spi_nor_hwcaps hwcaps;
struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
@ -445,6 +447,9 @@ struct spi_flash {
* @read_opcode: the read opcode
* @read_dummy: the dummy needed by the read operation
* @program_opcode: the program opcode
* @rdsr_dummy dummy cycles needed for Read Status Register command.
* @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
* command.
* @bank_read_cmd: Bank read cmd
* @bank_write_cmd: Bank write cmd
* @bank_curr: Current flash bank
@ -486,6 +491,8 @@ struct spi_nor {
u8 read_opcode;
u8 read_dummy;
u8 program_opcode;
u8 rdsr_dummy;
u8 rdsr_addr_nbytes;
#ifdef CONFIG_SPI_FLASH_BAR
u8 bank_read_cmd;
u8 bank_write_cmd;