board: keymile: convert to CONFIG_DM_I2C

The conversion to DM_I2C is mandatory, rework to remove
use of legacy I2C API.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Anatolij Gustschin 2024-07-20 01:24:22 +02:00 committed by Tom Rini
parent c5de07144a
commit 4beca13485
10 changed files with 30 additions and 59 deletions

View file

@ -11,9 +11,6 @@ if VENDOR_KM
menu "KM Board Setup"
config SYS_I2C_INIT_BOARD
def_bool y if ARM
config HUSH_INIT_VAR
def_bool y

View file

@ -129,7 +129,6 @@ void check_for_uboot_update(void)
}
#endif
#if defined(CONFIG_SYS_I2C_INIT_BOARD)
static void i2c_write_start_seq(void)
{
set_sda(1);
@ -187,17 +186,6 @@ int i2c_make_abort(void)
return ret;
}
/**
* i2c_init_board - reset i2c bus. When the board is powercycled during a
* bus transfer it might hang; for details see doc/I2C_Edge_Conditions.
*/
void i2c_init_board(void)
{
/* Now run the AbortSequence() */
i2c_make_abort();
}
#endif
#if defined(CONFIG_KM_COMMON_ETH_INIT)
int board_eth_init(struct bd_info *bis)
{

View file

@ -138,13 +138,12 @@ void early_bootcount_store(ulong ebootcount);
void check_for_uboot_update(void);
#define DELAY_ABORT_SEQ 62 /* @200kHz 9 clocks = 44us, 62us is ok */
#define DELAY_HALF_PERIOD (500 / (CONFIG_SYS_I2C_SPEED / 1000))
#define DELAY_HALF_PERIOD (500 / (I2C_SPEED_STANDARD_RATE / 1000))
void set_sda(int state);
void set_scl(int state);
int get_sda(void);
int get_scl(void);
int i2c_soft_read_pin(void);
int i2c_make_abort(void);
#endif /* __KEYMILE_COMMON_H */

View file

@ -342,9 +342,8 @@ static int ivm_populate_env(unsigned char *buf, int len, int mac_address_offset)
int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset)
{
int ret;
#if CONFIG_IS_ENABLED(DM_I2C)
struct udevice *eedev = NULL;
int ret;
ret = i2c_get_chip_for_busnum(CONFIG_KM_IVM_BUS,
CONFIG_SYS_IVM_EEPROM_ADR, 1, &eedev);
@ -354,22 +353,17 @@ int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset)
return 1;
}
#if CONFIG_IS_ENABLED(ARCH_LS1021A)
/* add deblocking here */
i2c_make_abort();
#endif
ret = dm_i2c_read(eedev, 0, buf, len);
if (ret != 0) {
printf("Error: Unable to read from I2C EEPROM at address %02X:%02X\n",
CONFIG_SYS_IVM_EEPROM_ADR, 0);
return 1;
}
#else
i2c_set_bus_num(CONFIG_KM_IVM_BUS);
/* add deblocking here */
i2c_make_abort();
ret = i2c_read(CONFIG_SYS_IVM_EEPROM_ADR, 0, 1, buf, len);
if (ret != 0) {
printf("Error reading EEprom\n");
return -2;
}
#endif
return ivm_populate_env(buf, len, mac_address_offset);
}

View file

@ -5,7 +5,6 @@
#include <config.h>
#include <event.h>
#include <i2c.h>
#include <asm/io.h>
#include <asm/arch/immap_ls102xa.h>
#include <asm/arch/clock.h>
@ -107,6 +106,13 @@ int board_early_init_f(void)
arch_soc_init();
/*
* Reset I2C bus. When the board is powercycled during a bus
* transfer it might hang; for details see doc/I2C_Edge_Conditions.
* Now run the AbortSequence()
*/
i2c_make_abort();
return 0;
}

View file

@ -8,9 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SOURCE_FILE="pg-wcom-expu1"
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1"
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_BOOTCOUNT_BOOTLIMIT=3
@ -78,7 +76,9 @@ CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_DM_I2C=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y

View file

@ -8,9 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SOURCE_FILE="pg-wcom-expu1"
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1"
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_BOOTCOUNT_BOOTLIMIT=3
@ -76,7 +74,9 @@ CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_DM_I2C=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y

View file

@ -8,9 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SOURCE_FILE="pg-wcom-seli8"
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8"
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_BOOTCOUNT_BOOTLIMIT=3
@ -78,7 +76,9 @@ CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_DM_I2C=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y

View file

@ -8,9 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SOURCE_FILE="pg-wcom-seli8"
CONFIG_ENV_SIZE=0x4000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8"
CONFIG_SYS_MONITOR_LEN=1048576
CONFIG_BOOTCOUNT_BOOTLIMIT=3
@ -76,7 +74,9 @@ CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_DM_I2C=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y

View file

@ -145,19 +145,6 @@
*/
#define CFG_SYS_NS16550_CLK get_serial_clock()
/*
* I2C
*/
#define CFG_SYS_I2C_MAX_HOPS 1
#define CFG_SYS_NUM_I2C_BUSES 3
#define I2C_MUX_PCA_ADDR 0x70
#define I2C_MUX_CH_DEFAULT 0x0
#define CFG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
{0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \
{1, {I2C_NULL_HOP} }, \
}
#define CFG_SMP_PEN_ADDR 0x01ee0200
#define HWCONFIG_BUFFER_SIZE 256