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board: keymile: convert to CONFIG_DM_I2C
The conversion to DM_I2C is mandatory, rework to remove use of legacy I2C API. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com> Cc: Holger Brunck <holger.brunck@hitachienergy.com> Cc: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
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parent
c5de07144a
commit
4beca13485
10 changed files with 30 additions and 59 deletions
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@ -11,9 +11,6 @@ if VENDOR_KM
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menu "KM Board Setup"
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config SYS_I2C_INIT_BOARD
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def_bool y if ARM
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config HUSH_INIT_VAR
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def_bool y
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@ -129,7 +129,6 @@ void check_for_uboot_update(void)
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}
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#endif
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#if defined(CONFIG_SYS_I2C_INIT_BOARD)
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static void i2c_write_start_seq(void)
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{
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set_sda(1);
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@ -187,17 +186,6 @@ int i2c_make_abort(void)
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return ret;
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}
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/**
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* i2c_init_board - reset i2c bus. When the board is powercycled during a
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* bus transfer it might hang; for details see doc/I2C_Edge_Conditions.
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*/
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void i2c_init_board(void)
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{
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/* Now run the AbortSequence() */
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i2c_make_abort();
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}
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#endif
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#if defined(CONFIG_KM_COMMON_ETH_INIT)
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int board_eth_init(struct bd_info *bis)
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{
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@ -138,13 +138,12 @@ void early_bootcount_store(ulong ebootcount);
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void check_for_uboot_update(void);
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#define DELAY_ABORT_SEQ 62 /* @200kHz 9 clocks = 44us, 62us is ok */
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#define DELAY_HALF_PERIOD (500 / (CONFIG_SYS_I2C_SPEED / 1000))
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#define DELAY_HALF_PERIOD (500 / (I2C_SPEED_STANDARD_RATE / 1000))
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void set_sda(int state);
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void set_scl(int state);
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int get_sda(void);
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int get_scl(void);
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int i2c_soft_read_pin(void);
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int i2c_make_abort(void);
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#endif /* __KEYMILE_COMMON_H */
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@ -342,9 +342,8 @@ static int ivm_populate_env(unsigned char *buf, int len, int mac_address_offset)
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int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset)
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{
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int ret;
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#if CONFIG_IS_ENABLED(DM_I2C)
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struct udevice *eedev = NULL;
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int ret;
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ret = i2c_get_chip_for_busnum(CONFIG_KM_IVM_BUS,
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CONFIG_SYS_IVM_EEPROM_ADR, 1, &eedev);
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@ -354,22 +353,17 @@ int ivm_read_eeprom(unsigned char *buf, int len, int mac_address_offset)
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return 1;
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}
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#if CONFIG_IS_ENABLED(ARCH_LS1021A)
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/* add deblocking here */
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i2c_make_abort();
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#endif
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ret = dm_i2c_read(eedev, 0, buf, len);
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if (ret != 0) {
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printf("Error: Unable to read from I2C EEPROM at address %02X:%02X\n",
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CONFIG_SYS_IVM_EEPROM_ADR, 0);
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return 1;
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}
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#else
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i2c_set_bus_num(CONFIG_KM_IVM_BUS);
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/* add deblocking here */
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i2c_make_abort();
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ret = i2c_read(CONFIG_SYS_IVM_EEPROM_ADR, 0, 1, buf, len);
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if (ret != 0) {
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printf("Error reading EEprom\n");
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return -2;
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}
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#endif
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return ivm_populate_env(buf, len, mac_address_offset);
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}
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@ -5,7 +5,6 @@
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#include <config.h>
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#include <event.h>
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#include <i2c.h>
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#include <asm/io.h>
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#include <asm/arch/immap_ls102xa.h>
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#include <asm/arch/clock.h>
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@ -107,6 +106,13 @@ int board_early_init_f(void)
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arch_soc_init();
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/*
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* Reset I2C bus. When the board is powercycled during a bus
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* transfer it might hang; for details see doc/I2C_Edge_Conditions.
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* Now run the AbortSequence()
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*/
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i2c_make_abort();
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return 0;
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}
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@ -8,9 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SOURCE_FILE="pg-wcom-expu1"
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CONFIG_ENV_SIZE=0x4000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1"
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CONFIG_SYS_MONITOR_LEN=1048576
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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@ -78,7 +76,9 @@ CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DDR_CLK_FREQ=50000000
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_DM_I2C=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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# CONFIG_MMC is not set
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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@ -8,9 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SOURCE_FILE="pg-wcom-expu1"
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CONFIG_ENV_SIZE=0x4000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1"
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CONFIG_SYS_MONITOR_LEN=1048576
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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@ -76,7 +74,9 @@ CONFIG_BOOTCOUNT_LIMIT=y
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DDR_CLK_FREQ=50000000
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_DM_I2C=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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# CONFIG_MMC is not set
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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@ -8,9 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SOURCE_FILE="pg-wcom-seli8"
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CONFIG_ENV_SIZE=0x4000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8"
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CONFIG_SYS_MONITOR_LEN=1048576
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DDR_CLK_FREQ=50000000
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_DM_I2C=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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# CONFIG_MMC is not set
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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@ -8,9 +8,7 @@ CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SOURCE_FILE="pg-wcom-seli8"
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CONFIG_ENV_SIZE=0x4000
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CONFIG_ENV_SECT_SIZE=0x20000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8"
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CONFIG_SYS_MONITOR_LEN=1048576
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CONFIG_BOOTCOUNT_BOOTLIMIT=3
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CONFIG_SYS_BOOTCOUNT_BE=y
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CONFIG_DDR_CLK_FREQ=50000000
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CONFIG_SYS_FSL_DDR3=y
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CONFIG_SYS_I2C_LEGACY=y
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CONFIG_DM_I2C=y
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CONFIG_I2C_MUX=y
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CONFIG_I2C_MUX_PCA954x=y
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# CONFIG_MMC is not set
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CONFIG_MTD=y
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CONFIG_MTD_NOR_FLASH=y
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@ -145,19 +145,6 @@
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*/
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#define CFG_SYS_NS16550_CLK get_serial_clock()
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/*
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* I2C
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*/
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#define CFG_SYS_I2C_MAX_HOPS 1
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#define CFG_SYS_NUM_I2C_BUSES 3
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#define I2C_MUX_PCA_ADDR 0x70
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#define I2C_MUX_CH_DEFAULT 0x0
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#define CFG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \
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{1, {I2C_NULL_HOP} }, \
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}
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#define CFG_SMP_PEN_ADDR 0x01ee0200
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#define HWCONFIG_BUFFER_SIZE 256
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