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sunxi: H3: fix non working console on uart2

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Fix non working console on uart2, that seems releated to both
Allwinner H2+ and H3.

Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com>
[Andre: remove H2+, rearrange pin setup order]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Angelo Dureghello 2021-10-09 14:18:59 +02:00 • committed by Andre Przywara
parent fbc8acf644
commit 482c1ccd1c
2 changed files with 5 additions and 0 deletions
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1
arch/arm/include/asm/arch-sunxi/gpio.h
View file

@ -136,6 +136,7 @@ enum sunxi_gpio_number {
#define SUNXI_GPIO_DISABLE 7 #define SUNXI_GPIO_DISABLE 7
#define SUN8I_H3_GPA_UART0 2 #define SUN8I_H3_GPA_UART0 2
#define SUN8I_H3_GPA_UART2 2
#define SUN4I_GPB_PWM 2 #define SUN4I_GPB_PWM 2
#define SUN4I_GPB_TWI0 2 #define SUN4I_GPB_TWI0 2

4
arch/arm/mach-sunxi/board.c
View file

@ -150,6 +150,10 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I_H3)
sunxi_gpio_set_cfgpin(SUNXI_GPA(0), SUN8I_H3_GPA_UART2);
sunxi_gpio_set_cfgpin(SUNXI_GPA(1), SUN8I_H3_GPA_UART2);
sunxi_gpio_set_pull(SUNXI_GPA(1), SUNXI_GPIO_PULL_UP);
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I) #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2); sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2); sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);