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arm: make __rel_dyn_{start, end} compiler-generated

Browse source 
This change is only done where needed: some linker
scripts may contain relocation symbols yet remain
unchanged.

__rel_dyn_start and __rel_dyn_end each requires
its own output section; putting them in relocation
sections changes their flags and breaks relocation.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This commit is contained in:
Albert ARIBAUD 2013-06-11 14:17:34 +02:00
parent d026dec875
commit 47bd65ef05
9 changed files with 74 additions and 23 deletions
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12
arch/arm/cpu/ixp/u-boot.lds
View file

@ -60,10 +60,18 @@ SECTIONS
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
_end = .;

12
arch/arm/cpu/u-boot.lds
View file

@ -62,10 +62,18 @@ SECTIONS
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
_end = .;

11
arch/arm/lib/relocate.S
View file

@ -55,10 +55,8 @@ copy_loop:
/*
* fix .rel.dyn relocations
*/
ldr r2, _rel_dyn_start_ofs /* r2 <- __rel_dyn_start local ofs */
add r2, r2, r7 /* r2 <- SRC &__rel_dyn_start */
ldr r3, _rel_dyn_end_ofs /* r3 <- __rel_dyn_end local ofs */
add r3, r3, r7 /* r3 <- SRC &__rel_dyn_end */
ldr r2, =__rel_dyn_start /* r2 <- SRC &__rel_dyn_start */
ldr r3, =__rel_dyn_end /* r3 <- SRC &__rel_dyn_end */
fixloop:
ldr r0, [r2] /* r0 <- SRC location to fix up */
add r0, r0, r9 /* r0 <- DST location to fix up */
@ -88,9 +86,4 @@ relocate_done:
bx lr
#endif
_rel_dyn_start_ofs:
.word __rel_dyn_start - relocate_code
_rel_dyn_end_ofs:
.word __rel_dyn_end - relocate_code
ENDPROC(relocate_code)

2
arch/arm/lib/sections.c
View file

@ -39,3 +39,5 @@ char __bss_start[0] __attribute__((section(".__bss_start")));
char __bss_end[0] __attribute__((section(".__bss_end")));
char __image_copy_start[0] __attribute__((section(".__image_copy_start")));
char __image_copy_end[0] __attribute__((section(".__image_copy_end")));
char __rel_dyn_start[0] __attribute__((section(".__rel_dyn_start")));
char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));

12
board/actux1/u-boot.lds
View file

@ -68,10 +68,18 @@ SECTIONS
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
_end = .;

12
board/actux2/u-boot.lds
View file

@ -68,10 +68,18 @@ SECTIONS
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
_end = .;

12
board/actux3/u-boot.lds
View file

@ -68,10 +68,18 @@ SECTIONS
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
_end = .;

12
board/dvlhost/u-boot.lds
View file

@ -68,10 +68,18 @@ SECTIONS
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
_end = .;

12
board/freescale/mx31ads/u-boot.lds
View file

@ -71,10 +71,18 @@ SECTIONS
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
_end = .;