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timer: starfive: Add Starfive timer support
Add timer driver in Starfive SoC. It is an timer that outside of CPU core and inside Starfive SoC. Signed-off-by: Kuan Lim Lee <kuanlim.lee@starfivetech.com> Signed-off-by: Wei Liang Lim <weiliang.lim@starfivetech.com> Changes for v2: - correct driver name, comment, variable Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
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1 changed files with 9 additions and 7 deletions
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0+
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// SPDX-License-Identifier: GPL-2.0+
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/*
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/*
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* Copyright 2022 StarFive, Inc. All rights reserved.
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* Copyright 2022 StarFive, Inc. All rights reserved.
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* Author: Lee Kuan Lim <kuanlim.lee@starfivetech.com>
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* Author: Kuan Lim Lee <kuanlim.lee@starfivetech.com>
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*/
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*/
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#include <common.h>
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#include <common.h>
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@ -48,8 +48,8 @@ static int starfive_probe(struct udevice *dev)
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int ret;
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int ret;
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priv->base = dev_read_addr_ptr(dev);
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priv->base = dev_read_addr_ptr(dev);
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if (IS_ERR(priv->base))
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if (!priv->base)
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return PTR_ERR(priv->base);
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return -EINVAL;
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timer_channel = dev_read_u32_default(dev, "channel", 0);
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timer_channel = dev_read_u32_default(dev, "channel", 0);
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priv->base = priv->base + (0x40 * timer_channel);
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priv->base = priv->base + (0x40 * timer_channel);
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@ -64,14 +64,16 @@ static int starfive_probe(struct udevice *dev)
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return ret;
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return ret;
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uc_priv->clock_rate = clk_get_rate(&clk);
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uc_priv->clock_rate = clk_get_rate(&clk);
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/* Initiate timer, channel 0 */
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/*
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/* Unmask Interrupt Mask */
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* Initiate timer, channel 0
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* Unmask Interrupt Mask
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*/
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writel(0, priv->base + STF_TIMER_INT_MASK);
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writel(0, priv->base + STF_TIMER_INT_MASK);
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/* Single run mode Setting */
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/* Single run mode Setting */
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if (dev_read_bool(dev, "single-run"))
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if (dev_read_bool(dev, "single-run"))
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writel(1, priv->base + STF_TIMER_CTL);
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writel(1, priv->base + STF_TIMER_CTL);
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/* Set Reload value */
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/* Set Reload value */
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priv->timer_size = dev_read_u32_default(dev, "timer-size", 0xffffffff);
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priv->timer_size = dev_read_u32_default(dev, "timer-size", -1U);
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writel(priv->timer_size, priv->base + STF_TIMER_LOAD);
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writel(priv->timer_size, priv->base + STF_TIMER_LOAD);
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/* Enable to start timer */
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/* Enable to start timer */
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writel(1, priv->base + STF_TIMER_ENABLE);
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writel(1, priv->base + STF_TIMER_ENABLE);
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@ -85,7 +87,7 @@ static const struct udevice_id starfive_ids[] = {
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};
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};
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U_BOOT_DRIVER(jh8100_starfive_timer) = {
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U_BOOT_DRIVER(jh8100_starfive_timer) = {
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.name = "jh8100_starfive_timer",
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.name = "starfive_timer",
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.id = UCLASS_TIMER,
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.id = UCLASS_TIMER,
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.of_match = starfive_ids,
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.of_match = starfive_ids,
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.probe = starfive_probe,
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.probe = starfive_probe,
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