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serial: mediatek: add support for bus clock and enable it

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Upstream linux also provide the additional optional bus clock.

Add support for it and also enable the baud and bus clock on probe.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi 2024-06-24 23:03:32 +02:00 • committed by Tom Rini
parent 72d01e4345
commit 41d2cab1fc
1 changed files with 8 additions and 0 deletions
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8
drivers/serial/serial_mtk.c
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@ -76,6 +76,7 @@ struct mtk_serial_regs {
* driver * driver
* @regs: Register base of the serial port * @regs: Register base of the serial port
* @clk: The baud clock device * @clk: The baud clock device
* @clk_bus: The bus clock device
* @fixed_clk_rate: Fallback fixed baud clock rate if baud clock * @fixed_clk_rate: Fallback fixed baud clock rate if baud clock
* device is not specified * device is not specified
* @force_highspeed: Force using high-speed mode * @force_highspeed: Force using high-speed mode
@ -83,6 +84,7 @@ struct mtk_serial_regs {
struct mtk_serial_priv { struct mtk_serial_priv {
struct mtk_serial_regs __iomem *regs; struct mtk_serial_regs __iomem *regs;
struct clk clk; struct clk clk;
struct clk clk_bus;
u32 fixed_clk_rate; u32 fixed_clk_rate;
bool force_highspeed; bool force_highspeed;
}; };
@ -220,6 +222,10 @@ static int mtk_serial_probe(struct udevice *dev)
writel(UART_MCRVAL, &priv->regs->mcr); writel(UART_MCRVAL, &priv->regs->mcr);
writel(UART_FCRVAL, &priv->regs->fcr); writel(UART_FCRVAL, &priv->regs->fcr);
clk_enable(&priv->clk);
if (priv->clk_bus.dev)
clk_enable(&priv->clk_bus);
return 0; return 0;
} }
@ -250,6 +256,8 @@ static int mtk_serial_of_to_plat(struct udevice *dev)
} }
} }
clk_get_by_name(dev, "bus", &priv->clk_bus);
priv->force_highspeed = dev_read_bool(dev, "mediatek,force-highspeed"); priv->force_highspeed = dev_read_bool(dev, "mediatek,force-highspeed");
return 0; return 0;