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Changes for 2020.04

Browse source 
-------------------
 
 - new board:
 	Phytec phyCORE-i.MX8MP
 	i.MX8MN Beacon EmbeddedWorks devkit
 
 - Fixes:
 	several nanbcb fixes
 	fix for imx8mm_beacon
 - further switch to distro boot commands
 - DM:
 	DM Ether for MX6UL
 
 CI:
 
 https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
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Merge tag 'u-boot-imx-20210125' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Changes for 2020.04
-------------------

- new board:
	Phytec phyCORE-i.MX8MP
	i.MX8MN Beacon EmbeddedWorks devkit

- Fixes:
	several nanbcb fixes
	fix for imx8mm_beacon
- further switch to distro boot commands
- DM:
	DM Ether for MX6UL

CI:

https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
This commit is contained in:
Tom Rini 2021-01-25 09:02:35 -05:00
commit 4057b98ff2
90 changed files with 10022 additions and 2340 deletions
Download patch file Download diff file Expand all files Collapse all files

30
include/dt-bindings/clock/imx8mn-clock.h
View file

@ -122,8 +122,8 @@
#define IMX8MN_CLK_I2C1 105
#define IMX8MN_CLK_I2C2 106
#define IMX8MN_CLK_I2C3 107
#define IMX8MN_CLK_I2C4 118
#define IMX8MN_CLK_UART1 119
#define IMX8MN_CLK_I2C4 108
#define IMX8MN_CLK_UART1 109
#define IMX8MN_CLK_UART2 110
#define IMX8MN_CLK_UART3 111
#define IMX8MN_CLK_UART4 112
@ -209,7 +209,31 @@
#define IMX8MN_CLK_ARM 191
#define IMX8MN_CLK_NAND_USDHC_BUS_RAWNAND_CLK 192
#define IMX8MN_CLK_GPU_CORE_ROOT 193
#define IMX8MN_CLK_GIC 194
#define IMX8MN_CLK_END 194
#define IMX8MN_SYS_PLL1_40M_CG 195
#define IMX8MN_SYS_PLL1_80M_CG 196
#define IMX8MN_SYS_PLL1_100M_CG 197
#define IMX8MN_SYS_PLL1_133M_CG 198
#define IMX8MN_SYS_PLL1_160M_CG 199
#define IMX8MN_SYS_PLL1_200M_CG 200
#define IMX8MN_SYS_PLL1_266M_CG 201
#define IMX8MN_SYS_PLL1_400M_CG 202
#define IMX8MN_SYS_PLL2_50M_CG 203
#define IMX8MN_SYS_PLL2_100M_CG 204
#define IMX8MN_SYS_PLL2_125M_CG 205
#define IMX8MN_SYS_PLL2_166M_CG 206
#define IMX8MN_SYS_PLL2_200M_CG 207
#define IMX8MN_SYS_PLL2_250M_CG 208
#define IMX8MN_SYS_PLL2_333M_CG 209
#define IMX8MN_SYS_PLL2_500M_CG 210
#define IMX8MN_CLK_SNVS_ROOT 211
#define IMX8MN_CLK_GPU_CORE 212
#define IMX8MN_CLK_GPU_SHADER 213
#define IMX8MN_CLK_A53_CORE 214
#define IMX8MN_CLK_END 215
#endif

95
include/dt-bindings/clock/imx8mp-clock.h
View file

@ -173,14 +173,14 @@
#define IMX8MP_CLK_IPP_DO_CLKO1 164
#define IMX8MP_CLK_IPP_DO_CLKO2 165
#define IMX8MP_CLK_HDMI_FDCC_TST 166
#define IMX8MP_CLK_HDMI_27M 167
#define IMX8MP_CLK_HDMI_24M 167
#define IMX8MP_CLK_HDMI_REF_266M 168
#define IMX8MP_CLK_USDHC3 169
#define IMX8MP_CLK_MEDIA_CAM1_PIX 170
#define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF 171
#define IMX8MP_CLK_MEDIA_DISP1_PIX 172
#define IMX8MP_CLK_MEDIA_CAM2_PIX 173
#define IMX8MP_CLK_MEDIA_MIPI_PHY2_REF 174
#define IMX8MP_CLK_MEDIA_LDB 174
#define IMX8MP_CLK_MEDIA_MIPI_CSI2_ESC 175
#define IMX8MP_CLK_PCIE2_CTRL 176
#define IMX8MP_CLK_PCIE2_PHY 177
@ -294,7 +294,96 @@
#define IMX8MP_CLK_DRAM_ALT_ROOT 285
#define IMX8MP_CLK_DRAM_CORE 286
#define IMX8MP_CLK_ARM 287
#define IMX8MP_CLK_A53_CORE 288
#define IMX8MP_CLK_END 288
#define IMX8MP_SYS_PLL1_40M_CG 289
#define IMX8MP_SYS_PLL1_80M_CG 290
#define IMX8MP_SYS_PLL1_100M_CG 291
#define IMX8MP_SYS_PLL1_133M_CG 292
#define IMX8MP_SYS_PLL1_160M_CG 293
#define IMX8MP_SYS_PLL1_200M_CG 294
#define IMX8MP_SYS_PLL1_266M_CG 295
#define IMX8MP_SYS_PLL1_400M_CG 296
#define IMX8MP_SYS_PLL2_50M_CG 297
#define IMX8MP_SYS_PLL2_100M_CG 298
#define IMX8MP_SYS_PLL2_125M_CG 299
#define IMX8MP_SYS_PLL2_166M_CG 300
#define IMX8MP_SYS_PLL2_200M_CG 301
#define IMX8MP_SYS_PLL2_250M_CG 302
#define IMX8MP_SYS_PLL2_333M_CG 303
#define IMX8MP_SYS_PLL2_500M_CG 304
#define IMX8MP_CLK_M7_CORE 305
#define IMX8MP_CLK_ML_CORE 306
#define IMX8MP_CLK_GPU3D_CORE 307
#define IMX8MP_CLK_GPU3D_SHADER_CORE 308
#define IMX8MP_CLK_GPU2D_CORE 309
#define IMX8MP_CLK_AUDIO_AXI 310
#define IMX8MP_CLK_HSIO_AXI 311
#define IMX8MP_CLK_MEDIA_ISP 312
#define IMX8MP_CLK_END 313
#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2 2
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK3 3
#define IMX8MP_CLK_AUDIOMIX_SAI2_IPG 4
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1 5
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2 6
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK3 7
#define IMX8MP_CLK_AUDIOMIX_SAI3_IPG 8
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1 9
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2 10
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK3 11
#define IMX8MP_CLK_AUDIOMIX_SAI5_IPG 12
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1 13
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2 14
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK3 15
#define IMX8MP_CLK_AUDIOMIX_SAI6_IPG 16
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1 17
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2 18
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK3 19
#define IMX8MP_CLK_AUDIOMIX_SAI7_IPG 20
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1 21
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2 22
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3 23
#define IMX8MP_CLK_AUDIOMIX_ASRC_IPG 24
#define IMX8MP_CLK_AUDIOMIX_PDM_IPG 25
#define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT 26
#define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT 27
#define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT 28
#define IMX8MP_CLK_AUDIOMIX_DSP_ROOT 29
#define IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT 30
#define IMX8MP_CLK_AUDIOMIX_EARC_IPG 31
#define IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG 32
#define IMX8MP_CLK_AUDIOMIX_AUD2HTX_IPG 33
#define IMX8MP_CLK_AUDIOMIX_EDMA_ROOT 34
#define IMX8MP_CLK_AUDIOMIX_AUDPLL_ROOT 35
#define IMX8MP_CLK_AUDIOMIX_MU2_ROOT 36
#define IMX8MP_CLK_AUDIOMIX_MU3_ROOT 37
#define IMX8MP_CLK_AUDIOMIX_EARC_PHY 38
#define IMX8MP_CLK_AUDIOMIX_PDM_ROOT 39
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1_SEL 40
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK2_SEL 41
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1_SEL 42
#define IMX8MP_CLK_AUDIOMIX_SAI2_MCLK2_SEL 43
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1_SEL 44
#define IMX8MP_CLK_AUDIOMIX_SAI3_MCLK2_SEL 45
#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK1_SEL 46
#define IMX8MP_CLK_AUDIOMIX_SAI4_MCLK2_SEL 47
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK1_SEL 48
#define IMX8MP_CLK_AUDIOMIX_SAI5_MCLK2_SEL 49
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK1_SEL 50
#define IMX8MP_CLK_AUDIOMIX_SAI6_MCLK2_SEL 51
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK1_SEL 52
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK2_SEL 53
#define IMX8MP_CLK_AUDIOMIX_PDM_SEL 54
#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_REF_SEL 55
#define IMX8MP_CLK_AUDIOMIX_SAI_PLL 56
#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS 57
#define IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT 58
#define IMX8MP_CLK_AUDIOMIX_END 59
#endif

31
include/dt-bindings/clock/imx8mq-clock.h
View file

@ -403,5 +403,34 @@
#define IMX8MQ_CLK_SNVS_ROOT 264
#define IMX8MQ_CLK_GIC 265
#define IMX8MQ_CLK_END 266
#define IMX8MQ_VIDEO2_PLL1_REF_SEL 266
#define IMX8MQ_SYS1_PLL_40M_CG 267
#define IMX8MQ_SYS1_PLL_80M_CG 268
#define IMX8MQ_SYS1_PLL_100M_CG 269
#define IMX8MQ_SYS1_PLL_133M_CG 270
#define IMX8MQ_SYS1_PLL_160M_CG 271
#define IMX8MQ_SYS1_PLL_200M_CG 272
#define IMX8MQ_SYS1_PLL_266M_CG 273
#define IMX8MQ_SYS1_PLL_400M_CG 274
#define IMX8MQ_SYS1_PLL_800M_CG 275
#define IMX8MQ_SYS2_PLL_50M_CG 276
#define IMX8MQ_SYS2_PLL_100M_CG 277
#define IMX8MQ_SYS2_PLL_125M_CG 278
#define IMX8MQ_SYS2_PLL_166M_CG 279
#define IMX8MQ_SYS2_PLL_200M_CG 280
#define IMX8MQ_SYS2_PLL_250M_CG 281
#define IMX8MQ_SYS2_PLL_333M_CG 282
#define IMX8MQ_SYS2_PLL_500M_CG 283
#define IMX8MQ_SYS2_PLL_1000M_CG 284
#define IMX8MQ_CLK_GPU_CORE 285
#define IMX8MQ_CLK_GPU_SHADER 286
#define IMX8MQ_CLK_M4_CORE 287
#define IMX8MQ_CLK_VPU_CORE 288
#define IMX8MQ_CLK_A53_CORE 289
#define IMX8MQ_CLK_END 290
#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */