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sh: Fix receive FIFO level register of SH4A
Receive FIFO level register is different in SH4A. Because register is different, cannot occasionally receive data. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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1 changed files with 30 additions and 22 deletions
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@ -53,18 +53,22 @@
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# define SCLSR (vu_short *)(SCIF_BASE + 0x28)
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# define SCRER (vu_short *)(SCIF_BASE + 0x2C)
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# define LSR_ORER 1
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# define FIFOLEVEL_MASK 0xFF
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#elif defined(CONFIG_CPU_SH7750) || \
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defined(CONFIG_CPU_SH7722)
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# define SCSPTR (vu_short *)(SCIF_BASE + 0x20)
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# define SCLSR (vu_short *)(SCIF_BASE + 0x24)
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# define LSR_ORER 1
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# define FIFOLEVEL_MASK 0x1F
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#elif defined(CONFIG_CPU_SH7720)
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# define SCLSR (vu_short *)(SCIF_BASE + 0x24)
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# define LSR_ORER 0x0200
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# define FIFOLEVEL_MASK 0x1F
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#elif defined(CONFIG_CPU_SH7710)
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defined(CONFIG_CPU_SH7712)
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# define SCLSR SCFSR /* SCSSR */
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# define LSR_ORER 1
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# define FIFOLEVEL_MASK 0x1F
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#endif
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/* SCBRR register value setting */
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@ -109,12 +113,16 @@ int serial_init (void)
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static int serial_tx_fifo_level (void)
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{
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return (*SCFDR >> 8) & 0x1F;
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return (*SCFDR >> 8) & FIFOLEVEL_MASK;
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}
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static int serial_rx_fifo_level (void)
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{
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return (*SCFDR >> 0) & 0x1F;
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#if defined(CONFIG_SH4A)
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return (*SCRFDR >> 0) & FIFOLEVEL_MASK;
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#else
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return (*SCFDR >> 0) & FIFOLEVEL_MASK;
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#endif
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}
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void serial_raw_putc (const char c)
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