Djam/u-boot
1
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2025-05-08 19:11:53 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

sbc8548: enable support for hardware SPD errata workaround

Browse source 
Existing boards by default have an issue where the LBC SDRAM
SPD EEPROM and the DDR2 SDRAM SPD EEPROM both land at 0x51.

After the hardware modification listed in the README is made,
then the DDR2 SPD EEPROM appears at 0x53.  So this implements
a board specific get_spd() by taking advantage of the existing
weak linkage, that 1st tries reading at 0x53 and then if that
fails, it falls back to the old 0x51.

Since the old dependency issue of "SPD implies no LBC SDRAM"
gets removed with the hardware errata fix, remove that restriction
in the code, so both LBC SDRAM and SPD can be selected.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Paul Gortmaker 2011-12-30 23:53:12 -05:00 • committed by Kumar Gala
parent 2a6b3b74d8
commit 3e3262bd14
3 changed files with 58 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

31
board/sbc8548/ddr.c
View file

@ -7,6 +7,7 @@
*/
#include <common.h>
#include <i2c.h>
#include <asm/fsl_ddr_sdram.h>
#include <asm/fsl_ddr_dimm_params.h>
@ -55,7 +56,35 @@ void fsl_ddr_board_options(memctl_options_t *popts,
popts->half_strength_driver_enable = 0;
}
#if !defined(CONFIG_SPD_EEPROM)
#ifdef CONFIG_SPD_EEPROM
/*
* Workaround for hardware errata. An i2c address conflict
* existed on earlier boards; the workaround moved the DDR
* SPD from 0x51 to 0x53. So we try and read 0x53 1st, and
* if that fails, then fall back to reading at 0x51.
*/
void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
{
int ret;
#ifdef ALT_SPD_EEPROM_ADDRESS
if (i2c_address == SPD_EEPROM_ADDRESS) {
ret = i2c_read(ALT_SPD_EEPROM_ADDRESS, 0, 1, (uchar *)spd,
sizeof(generic_spd_eeprom_t));
if (ret == 0)
return; /* Good data at 0x53 */
memset(spd, 0, sizeof(generic_spd_eeprom_t));
}
#endif
ret = i2c_read(i2c_address, 0, 1, (uchar *)spd,
sizeof(generic_spd_eeprom_t));
if (ret) {
printf("DDR: failed to read SPD from addr %u\n", i2c_address);
memset(spd, 0, sizeof(generic_spd_eeprom_t));
}
}
#else
/*
* fixed_sdram init -- doesn't use serial presence detect.
* Assumes 256MB DDR2 SDRAM SODIMM, without ECC, running at DDR400 speed.