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spi: cadence-quadspi: fix potential malfunction after ~49 days uptime
The get_timer function returns an unsigned long which may be calculated from the ARM system counter. This counter is reset only on a cold reset. U-boot divides this counter down to a 1000 Hz counter that will cross the 32bit barrier after a bit more than 49 days. Assigning the value to an unsigned int will truncate it on 64bit systems. Passing this truncated value back to the get_timer function will return a very large value that is certainly larger than the timeout and so will go down the error path and besides stopping U-Boot will lead to messages like "SPI: QSPI is still busy after poll for 5000 ms." Signed-off-by: Ronald Wahl <ronald.wahl@legrand.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
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1 changed files with 3 additions and 3 deletions
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@ -151,9 +151,9 @@ static int cadence_qspi_set_protocol(struct cadence_spi_priv *priv,
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/* Return 1 if idle, otherwise return 0 (busy). */
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static unsigned int cadence_qspi_wait_idle(void *reg_base)
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{
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unsigned int start, count = 0;
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unsigned long start, count = 0;
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/* timeout in unit of ms */
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unsigned int timeout = 5000;
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unsigned long timeout = 5000;
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start = get_timer(0);
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for ( ; get_timer(start) < timeout ; ) {
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@ -170,7 +170,7 @@ static unsigned int cadence_qspi_wait_idle(void *reg_base)
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}
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/* Timeout, still in busy mode. */
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printf("QSPI: QSPI is still busy after poll for %d ms.\n", timeout);
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printf("QSPI: QSPI is still busy after poll for %lu ms.\n", timeout);
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return 0;
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}
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