mirror of
https://github.com/u-boot/u-boot.git
synced 2025-04-21 20:34:38 +00:00
Merge patch series "Import "string" I/O functions from Linux"
To quote the author: This series imports generic versions of ioread_rep/iowrite_rep and reads/writes from Linux. Some cleanup is done to make sure that all platforms have proper defines for implemented functions and there are no redefinitions.
This commit is contained in:
commit
38cc6cdeb1
16 changed files with 450 additions and 118 deletions
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@ -336,6 +336,22 @@ BUILDIO_MEM(b, u8)
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BUILDIO_MEM(w, u16)
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BUILDIO_MEM(w, u16)
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BUILDIO_MEM(l, u32)
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BUILDIO_MEM(l, u32)
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BUILDIO_MEM(q, u64)
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BUILDIO_MEM(q, u64)
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#define __raw_readb __raw_readb
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#define __raw_readw __raw_readw
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#define __raw_readl __raw_readl
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#define __raw_readq __raw_readq
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#define __raw_writeb __raw_writeb
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#define __raw_writew __raw_writew
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#define __raw_writel __raw_writel
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#define __raw_writeq __raw_writeq
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#define readb readb
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#define readw readw
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#define readl readl
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#define readq readq
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#define writeb writeb
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#define writew writew
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#define writel writel
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#define writeq writeq
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#define __BUILD_IOPORT_PFX(bus, bwlq, type) \
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#define __BUILD_IOPORT_PFX(bus, bwlq, type) \
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__BUILD_IOPORT_SINGLE(bus, bwlq, type, ) \
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__BUILD_IOPORT_SINGLE(bus, bwlq, type, ) \
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@ -405,7 +421,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \
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} \
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} \
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} \
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} \
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\
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\
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static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \
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static inline void reads##bwlq(const volatile void __iomem *mem, \
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void *addr, \
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unsigned int count) \
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unsigned int count) \
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{ \
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{ \
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volatile type *__addr = addr; \
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volatile type *__addr = addr; \
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@ -448,8 +465,24 @@ __BUILD_IOPORT_STRING(bwlq, type)
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BUILDSTRING(b, u8)
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BUILDSTRING(b, u8)
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BUILDSTRING(w, u16)
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BUILDSTRING(w, u16)
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BUILDSTRING(l, u32)
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BUILDSTRING(l, u32)
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#define readsb readsb
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#define readsw readsw
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#define readsl readsl
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#define writesb writesb
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#define writesw writesw
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#define writesl writesl
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#define outsb outsb
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#define outsw outsw
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#define outsl outsl
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#define insb insb
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#define insw insw
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#define insl insl
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#ifdef CONFIG_64BIT
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#ifdef CONFIG_64BIT
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BUILDSTRING(q, u64)
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BUILDSTRING(q, u64)
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#define readsq readsq
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#define writesq writesq
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#define insq insq
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#define outsq outsq
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#endif
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#endif
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@ -94,6 +94,9 @@ static inline void insl (unsigned long port, void *dst, unsigned long count)
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unsigned long *p = dst;
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unsigned long *p = dst;
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while (count--) *p++ = inl (port);
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while (count--) *p++ = inl (port);
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}
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}
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#define insb insb
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#define insw insw
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#define insl insl
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static inline void outsb (unsigned long port, const void *src, unsigned long count)
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static inline void outsb (unsigned long port, const void *src, unsigned long count)
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{
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{
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@ -111,6 +114,9 @@ static inline void outsl (unsigned long port, const void *src, unsigned long cou
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const unsigned long *p = src;
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const unsigned long *p = src;
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while (count--) outl (*p++, port);
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while (count--) outl (*p++, port);
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}
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}
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#define outsb outsb
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#define outsw outsw
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#define outsl outsl
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/*
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/*
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* Clear and set bits in one shot. These macros can be used to clear and
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* Clear and set bits in one shot. These macros can be used to clear and
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@ -138,26 +138,37 @@ static inline unsigned char __raw_readb(const volatile void __iomem *addr)
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{
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{
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return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
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return *(volatile unsigned char *)PCI_FIX_ADDR(addr);
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}
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}
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#define __raw_readb __raw_readb
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static inline unsigned short __raw_readw(const volatile void __iomem *addr)
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static inline unsigned short __raw_readw(const volatile void __iomem *addr)
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{
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{
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return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
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return *(volatile unsigned short *)PCI_FIX_ADDR(addr);
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}
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}
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#define __raw_readw __raw_readw
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static inline unsigned int __raw_readl(const volatile void __iomem *addr)
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static inline unsigned int __raw_readl(const volatile void __iomem *addr)
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{
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{
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return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
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return *(volatile unsigned int *)PCI_FIX_ADDR(addr);
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}
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}
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#define __raw_readl __raw_readl
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static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
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static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
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{
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{
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*(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
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*(volatile unsigned char *)PCI_FIX_ADDR(addr) = v;
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}
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}
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#define __raw_writeb __raw_writeb
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static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
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static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
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{
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{
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*(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
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*(volatile unsigned short *)PCI_FIX_ADDR(addr) = v;
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}
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}
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#define __raw_writew __raw_writew
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static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
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static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
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{
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{
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*(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
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*(volatile unsigned int *)PCI_FIX_ADDR(addr) = v;
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}
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}
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#define __raw_writel __raw_writel
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/*
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/*
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* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
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* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
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@ -218,7 +218,8 @@ static inline u64 readq(const volatile void __iomem *addr)
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#define insw(p, d, l) readsw(__io(p), d, l)
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#define insw(p, d, l) readsw(__io(p), d, l)
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#define insl(p, d, l) readsl(__io(p), d, l)
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#define insl(p, d, l) readsl(__io(p), d, l)
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static inline void readsb(unsigned int *addr, void *data, int bytelen)
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static inline void readsb(const volatile void __iomem *addr, void *data,
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unsigned int bytelen)
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{
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{
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unsigned char *ptr;
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unsigned char *ptr;
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unsigned char *ptr2;
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unsigned char *ptr2;
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@ -233,7 +234,8 @@ static inline void readsb(unsigned int *addr, void *data, int bytelen)
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}
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}
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}
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}
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static inline void readsw(unsigned int *addr, void *data, int wordlen)
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static inline void readsw(const volatile void __iomem *addr, void *data,
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unsigned int wordlen)
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{
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{
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unsigned short *ptr;
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unsigned short *ptr;
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unsigned short *ptr2;
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unsigned short *ptr2;
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@ -248,7 +250,8 @@ static inline void readsw(unsigned int *addr, void *data, int wordlen)
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}
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}
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}
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}
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static inline void readsl(unsigned int *addr, void *data, int longlen)
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static inline void readsl(const volatile void __iomem *addr, void *data,
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unsigned int longlen)
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{
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{
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unsigned int *ptr;
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unsigned int *ptr;
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unsigned int *ptr2;
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unsigned int *ptr2;
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@ -263,7 +266,8 @@ static inline void readsl(unsigned int *addr, void *data, int longlen)
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}
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}
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}
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}
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static inline void writesb(unsigned int *addr, const void *data, int bytelen)
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static inline void writesb(volatile void __iomem *addr, const void *data,
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unsigned int bytelen)
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{
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{
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unsigned char *ptr;
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unsigned char *ptr;
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unsigned char *ptr2;
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unsigned char *ptr2;
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@ -278,7 +282,8 @@ static inline void writesb(unsigned int *addr, const void *data, int bytelen)
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}
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}
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}
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}
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static inline void writesw(unsigned int *addr, const void *data, int wordlen)
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static inline void writesw(volatile void __iomem *addr, const void *data,
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unsigned int wordlen)
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{
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{
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unsigned short *ptr;
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unsigned short *ptr;
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unsigned short *ptr2;
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unsigned short *ptr2;
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@ -293,7 +298,8 @@ static inline void writesw(unsigned int *addr, const void *data, int wordlen)
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}
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}
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}
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}
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static inline void writesl(unsigned int *addr, const void *data, int longlen)
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static inline void writesl(volatile void __iomem *addr, const void *data,
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unsigned int longlen)
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{
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{
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unsigned int *ptr;
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unsigned int *ptr;
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unsigned int *ptr2;
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unsigned int *ptr2;
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@ -307,6 +313,14 @@ static inline void writesl(unsigned int *addr, const void *data, int longlen)
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longlen--;
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longlen--;
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}
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}
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}
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}
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#define readsb readsb
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#define readsw readsw
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#define readsl readsl
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#define writesb writesb
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#define writesw writesw
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#define writesl writesl
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#endif
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#endif
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#define outb_p(val, port) outb((val), (port))
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#define outb_p(val, port) outb((val), (port))
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@ -28,20 +28,6 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags);
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void unmap_physmem(const void *vaddr, unsigned long flags);
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void unmap_physmem(const void *vaddr, unsigned long flags);
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#define unmap_physmem unmap_physmem
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#define unmap_physmem unmap_physmem
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#include <asm-generic/io.h>
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/* For sandbox, we want addresses to point into our RAM buffer */
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static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
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{
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return map_physmem(paddr, len, MAP_WRBACK);
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}
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/* Remove a previous mapping */
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static inline void unmap_sysmem(const void *vaddr)
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{
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unmap_physmem(vaddr, MAP_WRBACK);
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}
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/* Map from a pointer to our RAM buffer */
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/* Map from a pointer to our RAM buffer */
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phys_addr_t map_to_sysmem(const void *ptr);
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phys_addr_t map_to_sysmem(const void *ptr);
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@ -229,5 +215,19 @@ static inline void memcpy_toio(volatile void *dst, const void *src, int count)
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#include <iotrace.h>
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#include <iotrace.h>
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#include <asm/types.h>
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#include <asm/types.h>
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#include <asm-generic/io.h>
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|
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/* For sandbox, we want addresses to point into our RAM buffer */
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static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
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{
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return map_physmem(paddr, len, MAP_WRBACK);
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}
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/* Remove a previous mapping */
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static inline void unmap_sysmem(const void *vaddr)
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{
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unmap_physmem(vaddr, MAP_WRBACK);
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}
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#endif
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#endif
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|
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@ -202,10 +202,16 @@ __OUT(l,,int)
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__INS(b)
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__INS(b)
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__INS(w)
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__INS(w)
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__INS(l)
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__INS(l)
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#define insb insb
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#define insw insw
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#define insl insl
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|
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__OUTS(b)
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__OUTS(b)
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__OUTS(w)
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__OUTS(w)
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__OUTS(l)
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__OUTS(l)
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#define outsb outsb
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#define outsw outsw
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#define outsl outsl
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|
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/* IO space accessors */
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/* IO space accessors */
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#define clrio(type, addr, clear) \
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#define clrio(type, addr, clear) \
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|
|
|
@ -76,6 +76,12 @@ void insl(unsigned long port, void *dst, unsigned long count);
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void outsb(unsigned long port, const void *src, unsigned long count);
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void outsb(unsigned long port, const void *src, unsigned long count);
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void outsw(unsigned long port, const void *src, unsigned long count);
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void outsw(unsigned long port, const void *src, unsigned long count);
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void outsl(unsigned long port, const void *src, unsigned long count);
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void outsl(unsigned long port, const void *src, unsigned long count);
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|
#define insb insb
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|
#define insw insw
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|
#define insl insl
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|
#define outsb outsb
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|
#define outsw outsw
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|
#define outsl outsl
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|
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#define IO_SPACE_LIMIT ~0
|
#define IO_SPACE_LIMIT ~0
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|
|
||||||
|
|
|
@ -351,40 +351,6 @@ static int atmel_nfc_wait(struct atmel_hsmc_nand_controller *nc, bool poll,
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return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void iowrite8_rep(void *addr, const uint8_t *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
|
|
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for (i = 0; i < len; i++)
|
|
||||||
writeb(buf[i], addr);
|
|
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}
|
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||||||
|
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||||||
static void ioread8_rep(void *addr, uint8_t *buf, int len)
|
|
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{
|
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||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
buf[i] = readb(addr);
|
|
||||||
}
|
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||||||
|
|
||||||
static void ioread16_rep(void *addr, void *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
u16 *p = (u16 *)buf;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
p[i] = readw(addr);
|
|
||||||
}
|
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||||||
|
|
||||||
static void iowrite16_rep(void *addr, const void *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
u16 *p = (u16 *)buf;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
writew(p[i], addr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static u8 atmel_nand_read_byte(struct mtd_info *mtd)
|
static u8 atmel_nand_read_byte(struct mtd_info *mtd)
|
||||||
{
|
{
|
||||||
struct nand_chip *chip = mtd_to_nand(mtd);
|
struct nand_chip *chip = mtd_to_nand(mtd);
|
||||||
|
|
|
@ -245,39 +245,6 @@ static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte)
|
||||||
chip->write_buf(mtd, (uint8_t *)&word, 2);
|
chip->write_buf(mtd, (uint8_t *)&word, 2);
|
||||||
}
|
}
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||||||
|
|
||||||
static void iowrite8_rep(void *addr, const uint8_t *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
writeb(buf[i], addr);
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|
||||||
}
|
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||||||
static void ioread8_rep(void *addr, uint8_t *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
buf[i] = readb(addr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ioread16_rep(void *addr, void *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
u16 *p = (u16 *) buf;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
p[i] = readw(addr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void iowrite16_rep(void *addr, void *buf, int len)
|
|
||||||
{
|
|
||||||
int i;
|
|
||||||
u16 *p = (u16 *) buf;
|
|
||||||
|
|
||||||
for (i = 0; i < len; i++)
|
|
||||||
writew(p[i], addr);
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* nand_write_buf - [DEFAULT] write buffer to chip
|
* nand_write_buf - [DEFAULT] write buffer to chip
|
||||||
* @mtd: MTD device structure
|
* @mtd: MTD device structure
|
||||||
|
|
|
@ -7,7 +7,6 @@
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <clk.h>
|
#include <clk.h>
|
||||||
#include <log.h>
|
#include <log.h>
|
||||||
#include <asm-generic/io.h>
|
|
||||||
#include <dm.h>
|
#include <dm.h>
|
||||||
#include <fdtdec.h>
|
#include <fdtdec.h>
|
||||||
#include <malloc.h>
|
#include <malloc.h>
|
||||||
|
@ -17,6 +16,7 @@
|
||||||
#include <dm/device_compat.h>
|
#include <dm/device_compat.h>
|
||||||
#include <linux/err.h>
|
#include <linux/err.h>
|
||||||
#include <linux/errno.h>
|
#include <linux/errno.h>
|
||||||
|
#include <linux/io.h>
|
||||||
#include <linux/sizes.h>
|
#include <linux/sizes.h>
|
||||||
#include <linux/time.h>
|
#include <linux/time.h>
|
||||||
#include <zynqmp_firmware.h>
|
#include <zynqmp_firmware.h>
|
||||||
|
|
|
@ -130,7 +130,7 @@ static void amlogic_spifc_a1_drain_buffer(struct amlogic_spifc_a1 *spifc,
|
||||||
|
|
||||||
writel(SPIFC_A1_DBUF_AUTO_UPDATE_ADDR,
|
writel(SPIFC_A1_DBUF_AUTO_UPDATE_ADDR,
|
||||||
spifc->base + SPIFC_A1_DBUF_CTRL_REG);
|
spifc->base + SPIFC_A1_DBUF_CTRL_REG);
|
||||||
readsl(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
|
ioread32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
|
||||||
|
|
||||||
if (pad) {
|
if (pad) {
|
||||||
data = readl(spifc->base + SPIFC_A1_DBUF_DATA_REG);
|
data = readl(spifc->base + SPIFC_A1_DBUF_DATA_REG);
|
||||||
|
@ -147,7 +147,7 @@ static void amlogic_spifc_a1_fill_buffer(struct amlogic_spifc_a1 *spifc,
|
||||||
|
|
||||||
writel(SPIFC_A1_DBUF_DIR | SPIFC_A1_DBUF_AUTO_UPDATE_ADDR,
|
writel(SPIFC_A1_DBUF_DIR | SPIFC_A1_DBUF_AUTO_UPDATE_ADDR,
|
||||||
spifc->base + SPIFC_A1_DBUF_CTRL_REG);
|
spifc->base + SPIFC_A1_DBUF_CTRL_REG);
|
||||||
writesl(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
|
iowrite32_rep(spifc->base + SPIFC_A1_DBUF_DATA_REG, buf, count);
|
||||||
|
|
||||||
if (pad) {
|
if (pad) {
|
||||||
memcpy(&data, buf + len - pad, pad);
|
memcpy(&data, buf + len - pad, pad);
|
||||||
|
|
|
@ -6,7 +6,6 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <asm-generic/io.h>
|
|
||||||
#include <clk.h>
|
#include <clk.h>
|
||||||
#include <dm.h>
|
#include <dm.h>
|
||||||
#include <dm/device_compat.h>
|
#include <dm/device_compat.h>
|
||||||
|
|
|
@ -8,13 +8,13 @@
|
||||||
|
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <log.h>
|
#include <log.h>
|
||||||
#include <asm-generic/io.h>
|
|
||||||
#include <dm.h>
|
#include <dm.h>
|
||||||
#include <dm/device-internal.h>
|
#include <dm/device-internal.h>
|
||||||
#include <dm/lists.h>
|
#include <dm/lists.h>
|
||||||
#include <dwc3-uboot.h>
|
#include <dwc3-uboot.h>
|
||||||
#include <generic-phy.h>
|
#include <generic-phy.h>
|
||||||
#include <linux/delay.h>
|
#include <linux/delay.h>
|
||||||
|
#include <linux/io.h>
|
||||||
#include <linux/printk.h>
|
#include <linux/printk.h>
|
||||||
#include <linux/usb/ch9.h>
|
#include <linux/usb/ch9.h>
|
||||||
#include <linux/usb/gadget.h>
|
#include <linux/usb/gadget.h>
|
||||||
|
|
|
@ -8,12 +8,12 @@
|
||||||
|
|
||||||
#define DEBUG
|
#define DEBUG
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <asm-generic/io.h>
|
|
||||||
#include <dm.h>
|
#include <dm.h>
|
||||||
#include <dm/device-internal.h>
|
#include <dm/device-internal.h>
|
||||||
#include <dm/lists.h>
|
#include <dm/lists.h>
|
||||||
#include <dwc3-uboot.h>
|
#include <dwc3-uboot.h>
|
||||||
#include <generic-phy.h>
|
#include <generic-phy.h>
|
||||||
|
#include <linux/io.h>
|
||||||
#include <linux/usb/ch9.h>
|
#include <linux/usb/ch9.h>
|
||||||
#include <linux/usb/gadget.h>
|
#include <linux/usb/gadget.h>
|
||||||
#include <malloc.h>
|
#include <malloc.h>
|
||||||
|
|
|
@ -14,31 +14,7 @@
|
||||||
#ifndef __MUSB_LINUX_PLATFORM_ARCH_H__
|
#ifndef __MUSB_LINUX_PLATFORM_ARCH_H__
|
||||||
#define __MUSB_LINUX_PLATFORM_ARCH_H__
|
#define __MUSB_LINUX_PLATFORM_ARCH_H__
|
||||||
|
|
||||||
#ifndef __UBOOT__
|
|
||||||
#include <linux/io.h>
|
#include <linux/io.h>
|
||||||
#else
|
|
||||||
#include <asm/io.h>
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \
|
|
||||||
&& !defined(CONFIG_PPC32) \
|
|
||||||
&& !defined(CONFIG_PPC64) && !defined(CONFIG_MIPS) \
|
|
||||||
&& !defined(CONFIG_M68K)
|
|
||||||
static inline void readsl(const void __iomem *addr, void *buf, int len)
|
|
||||||
{ insl((unsigned long)addr, buf, len); }
|
|
||||||
static inline void readsw(const void __iomem *addr, void *buf, int len)
|
|
||||||
{ insw((unsigned long)addr, buf, len); }
|
|
||||||
static inline void readsb(const void __iomem *addr, void *buf, int len)
|
|
||||||
{ insb((unsigned long)addr, buf, len); }
|
|
||||||
|
|
||||||
static inline void writesl(const void __iomem *addr, const void *buf, int len)
|
|
||||||
{ outsl((unsigned long)addr, buf, len); }
|
|
||||||
static inline void writesw(const void __iomem *addr, const void *buf, int len)
|
|
||||||
{ outsw((unsigned long)addr, buf, len); }
|
|
||||||
static inline void writesb(const void __iomem *addr, const void *buf, int len)
|
|
||||||
{ outsb((unsigned long)addr, buf, len); }
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* NOTE: these offsets are all in bytes */
|
/* NOTE: these offsets are all in bytes */
|
||||||
|
|
||||||
|
|
|
@ -105,5 +105,353 @@ static inline void unmap_physmem(void *vaddr, unsigned long flags)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* __raw_{read,write}{b,w,l,q}() access memory in native endianness.
|
||||||
|
*
|
||||||
|
* On some architectures memory mapped IO needs to be accessed differently.
|
||||||
|
* On the simple architectures, we just read/write the memory location
|
||||||
|
* directly.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __raw_readb
|
||||||
|
#define __raw_readb __raw_readb
|
||||||
|
static inline u8 __raw_readb(const volatile void __iomem *addr)
|
||||||
|
{
|
||||||
|
return *(const volatile u8 __force *)addr;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef __raw_readw
|
||||||
|
#define __raw_readw __raw_readw
|
||||||
|
static inline u16 __raw_readw(const volatile void __iomem *addr)
|
||||||
|
{
|
||||||
|
return *(const volatile u16 __force *)addr;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef __raw_readl
|
||||||
|
#define __raw_readl __raw_readl
|
||||||
|
static inline u32 __raw_readl(const volatile void __iomem *addr)
|
||||||
|
{
|
||||||
|
return *(const volatile u32 __force *)addr;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_64BIT
|
||||||
|
#ifndef __raw_readq
|
||||||
|
#define __raw_readq __raw_readq
|
||||||
|
static inline u64 __raw_readq(const volatile void __iomem *addr)
|
||||||
|
{
|
||||||
|
return *(const volatile u64 __force *)addr;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* CONFIG_64BIT */
|
||||||
|
|
||||||
|
#ifndef __raw_writeb
|
||||||
|
#define __raw_writeb __raw_writeb
|
||||||
|
static inline void __raw_writeb(u8 value, volatile void __iomem *addr)
|
||||||
|
{
|
||||||
|
*(volatile u8 __force *)addr = value;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef __raw_writew
|
||||||
|
#define __raw_writew __raw_writew
|
||||||
|
static inline void __raw_writew(u16 value, volatile void __iomem *addr)
|
||||||
|
{
|
||||||
|
*(volatile u16 __force *)addr = value;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef __raw_writel
|
||||||
|
#define __raw_writel __raw_writel
|
||||||
|
static inline void __raw_writel(u32 value, volatile void __iomem *addr)
|
||||||
|
{
|
||||||
|
*(volatile u32 __force *)addr = value;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_64BIT
|
||||||
|
#ifndef __raw_writeq
|
||||||
|
#define __raw_writeq __raw_writeq
|
||||||
|
static inline void __raw_writeq(u64 value, volatile void __iomem *addr)
|
||||||
|
{
|
||||||
|
*(volatile u64 __force *)addr = value;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* CONFIG_64BIT */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* {read,write}s{b,w,l,q}() repeatedly access the same memory address in
|
||||||
|
* native endianness in 8-, 16-, 32- or 64-bit chunks (@count times).
|
||||||
|
*/
|
||||||
|
#ifndef readsb
|
||||||
|
#define readsb readsb
|
||||||
|
static inline void readsb(const volatile void __iomem *addr, void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
if (count) {
|
||||||
|
u8 *buf = buffer;
|
||||||
|
|
||||||
|
do {
|
||||||
|
u8 x = __raw_readb(addr);
|
||||||
|
*buf++ = x;
|
||||||
|
} while (--count);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef readsw
|
||||||
|
#define readsw readsw
|
||||||
|
static inline void readsw(const volatile void __iomem *addr, void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
if (count) {
|
||||||
|
u16 *buf = buffer;
|
||||||
|
|
||||||
|
do {
|
||||||
|
u16 x = __raw_readw(addr);
|
||||||
|
*buf++ = x;
|
||||||
|
} while (--count);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef readsl
|
||||||
|
#define readsl readsl
|
||||||
|
static inline void readsl(const volatile void __iomem *addr, void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
if (count) {
|
||||||
|
u32 *buf = buffer;
|
||||||
|
|
||||||
|
do {
|
||||||
|
u32 x = __raw_readl(addr);
|
||||||
|
*buf++ = x;
|
||||||
|
} while (--count);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_64BIT
|
||||||
|
#ifndef readsq
|
||||||
|
#define readsq readsq
|
||||||
|
static inline void readsq(const volatile void __iomem *addr, void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
if (count) {
|
||||||
|
u64 *buf = buffer;
|
||||||
|
|
||||||
|
do {
|
||||||
|
u64 x = __raw_readq(addr);
|
||||||
|
*buf++ = x;
|
||||||
|
} while (--count);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* CONFIG_64BIT */
|
||||||
|
|
||||||
|
#ifndef writesb
|
||||||
|
#define writesb writesb
|
||||||
|
static inline void writesb(volatile void __iomem *addr, const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
if (count) {
|
||||||
|
const u8 *buf = buffer;
|
||||||
|
|
||||||
|
do {
|
||||||
|
__raw_writeb(*buf++, addr);
|
||||||
|
} while (--count);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef writesw
|
||||||
|
#define writesw writesw
|
||||||
|
static inline void writesw(volatile void __iomem *addr, const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
if (count) {
|
||||||
|
const u16 *buf = buffer;
|
||||||
|
|
||||||
|
do {
|
||||||
|
__raw_writew(*buf++, addr);
|
||||||
|
} while (--count);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef writesl
|
||||||
|
#define writesl writesl
|
||||||
|
static inline void writesl(volatile void __iomem *addr, const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
if (count) {
|
||||||
|
const u32 *buf = buffer;
|
||||||
|
|
||||||
|
do {
|
||||||
|
__raw_writel(*buf++, addr);
|
||||||
|
} while (--count);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_64BIT
|
||||||
|
#ifndef writesq
|
||||||
|
#define writesq writesq
|
||||||
|
static inline void writesq(volatile void __iomem *addr, const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
if (count) {
|
||||||
|
const u64 *buf = buffer;
|
||||||
|
|
||||||
|
do {
|
||||||
|
__raw_writeq(*buf++, addr);
|
||||||
|
} while (--count);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* CONFIG_64BIT */
|
||||||
|
|
||||||
|
#ifndef PCI_IOBASE
|
||||||
|
#define PCI_IOBASE ((void __iomem *)0)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* {in,out}s{b,w,l}{,_p}() are variants of the above that repeatedly access a
|
||||||
|
* single I/O port multiple times.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef insb
|
||||||
|
#define insb insb
|
||||||
|
static inline void insb(unsigned long addr, void *buffer, unsigned int count)
|
||||||
|
{
|
||||||
|
readsb(PCI_IOBASE + addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef insw
|
||||||
|
#define insw insw
|
||||||
|
static inline void insw(unsigned long addr, void *buffer, unsigned int count)
|
||||||
|
{
|
||||||
|
readsw(PCI_IOBASE + addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef insl
|
||||||
|
#define insl insl
|
||||||
|
static inline void insl(unsigned long addr, void *buffer, unsigned int count)
|
||||||
|
{
|
||||||
|
readsl(PCI_IOBASE + addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef outsb
|
||||||
|
#define outsb outsb
|
||||||
|
static inline void outsb(unsigned long addr, const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
writesb(PCI_IOBASE + addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef outsw
|
||||||
|
#define outsw outsw
|
||||||
|
static inline void outsw(unsigned long addr, const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
writesw(PCI_IOBASE + addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef outsl
|
||||||
|
#define outsl outsl
|
||||||
|
static inline void outsl(unsigned long addr, const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
writesl(PCI_IOBASE + addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef ioread8_rep
|
||||||
|
#define ioread8_rep ioread8_rep
|
||||||
|
static inline void ioread8_rep(const volatile void __iomem *addr, void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
readsb(addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef ioread16_rep
|
||||||
|
#define ioread16_rep ioread16_rep
|
||||||
|
static inline void ioread16_rep(const volatile void __iomem *addr,
|
||||||
|
void *buffer, unsigned int count)
|
||||||
|
{
|
||||||
|
readsw(addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef ioread32_rep
|
||||||
|
#define ioread32_rep ioread32_rep
|
||||||
|
static inline void ioread32_rep(const volatile void __iomem *addr,
|
||||||
|
void *buffer, unsigned int count)
|
||||||
|
{
|
||||||
|
readsl(addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_64BIT
|
||||||
|
#ifndef ioread64_rep
|
||||||
|
#define ioread64_rep ioread64_rep
|
||||||
|
static inline void ioread64_rep(const volatile void __iomem *addr,
|
||||||
|
void *buffer, unsigned int count)
|
||||||
|
{
|
||||||
|
readsq(addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* CONFIG_64BIT */
|
||||||
|
|
||||||
|
#ifndef iowrite8_rep
|
||||||
|
#define iowrite8_rep iowrite8_rep
|
||||||
|
static inline void iowrite8_rep(volatile void __iomem *addr,
|
||||||
|
const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
writesb(addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef iowrite16_rep
|
||||||
|
#define iowrite16_rep iowrite16_rep
|
||||||
|
static inline void iowrite16_rep(volatile void __iomem *addr,
|
||||||
|
const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
writesw(addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef iowrite32_rep
|
||||||
|
#define iowrite32_rep iowrite32_rep
|
||||||
|
static inline void iowrite32_rep(volatile void __iomem *addr,
|
||||||
|
const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
writesl(addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_64BIT
|
||||||
|
#ifndef iowrite64_rep
|
||||||
|
#define iowrite64_rep iowrite64_rep
|
||||||
|
static inline void iowrite64_rep(volatile void __iomem *addr,
|
||||||
|
const void *buffer,
|
||||||
|
unsigned int count)
|
||||||
|
{
|
||||||
|
writesq(addr, buffer, count);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* CONFIG_64BIT */
|
||||||
|
|
||||||
#endif /* !__ASSEMBLY__ */
|
#endif /* !__ASSEMBLY__ */
|
||||||
#endif /* __ASM_GENERIC_IO_H__ */
|
#endif /* __ASM_GENERIC_IO_H__ */
|
||||||
|
|
Loading…
Add table
Reference in a new issue