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arm: socfpga: Move Stratix10 and Agilex clock manager common code
Move Stratix10 and Agilex clock manager common code to new header file. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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2 changed files with 26 additions and 13 deletions
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@ -1,12 +1,14 @@
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/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
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* Copyright (C) 2016-2019 Intel Corporation <www.intel.com>
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*
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*/
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#ifndef _CLOCK_MANAGER_S10_
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#define _CLOCK_MANAGER_S10_
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#include <asm/arch/clock_manager_soc64.h>
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/* Clock speed accessors */
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unsigned long cm_get_mpu_clk_hz(void);
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unsigned long cm_get_sdram_clk_hz(void);
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@ -14,18 +16,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
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unsigned int cm_get_mmc_controller_clk_hz(void);
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unsigned int cm_get_qspi_controller_clk_hz(void);
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unsigned int cm_get_spi_controller_clk_hz(void);
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const unsigned int cm_get_osc_clk_hz(void);
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const unsigned int cm_get_f2s_per_ref_clk_hz(void);
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const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
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const unsigned int cm_get_intosc_clk_hz(void);
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const unsigned int cm_get_fpga_clk_hz(void);
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#define CLKMGR_EOSC1_HZ 25000000
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#define CLKMGR_INTOSC_HZ 460000000
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#define CLKMGR_FPGA_CLK_HZ 50000000
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/* Clock configuration accessors */
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const struct cm_config * const cm_get_default_config(void);
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struct cm_config {
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/* main group */
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