arm: dts: k3: Remove unneeded ti, sci-sysreset binding and nodes

This extra binding is non-standard and now unneeded as we bind the
sysreset driver automatically. This matches what is done in Linux
and allows us to more closely match the DTBs. Remove the binding
and all users.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>

arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi

@@ -41,13 +41,6 @@
 	clock-frequency = <25000000>;
 };
 
-&dmsc {
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
-};
-
 &sd_pins_default {
 	/* Force to use SDCD card detect pin */
 	pinctrl-single,pins = <

arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi

@@ -42,13 +42,6 @@
 	bootph-all;
 };
 
-&dmsc {
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
-};
-
 &fss {
 	bootph-all;
 };

arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi

@@ -85,13 +85,6 @@
 	bootph-all;
 };
 
-&dmsc {
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
-};
-
 &fss {
 	bootph-all;
 };

arch/arm/dts/k3-am62a7-sk-u-boot.dtsi

@@ -119,10 +119,6 @@
 
 &dmsc {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &vdd_mmc1 {

arch/arm/dts/k3-am62p5-sk-u-boot.dtsi

@@ -15,9 +15,4 @@
 
 &dmsc {
 	bootph-pre-ram;
-
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-pre-ram;
-	};
 };

arch/arm/dts/k3-am642-evm-u-boot.dtsi

@@ -23,13 +23,6 @@
 	bootph-all;
 };
 
-&dmsc {
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
-};
-
 &sdhci0 {
 	bootph-all;
 };

arch/arm/dts/k3-am642-phyboard-electra-rdk-u-boot.dtsi

@@ -29,10 +29,6 @@
 
 &dmsc {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &dmss {

arch/arm/dts/k3-am642-sk-u-boot.dtsi

@@ -15,13 +15,6 @@
 	clock-frequency = <200000000>;
 };
 
-&dmsc {
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
-};
-
 &sdhci0 {
 	status = "disabled";
 };

arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi

@@ -99,10 +99,6 @@
 
 &dmsc {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &k3_pds {

arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi

@@ -51,10 +51,6 @@
 
 &sms {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &main_pmx0 {

arch/arm/dts/k3-am69-sk-u-boot.dtsi

@@ -23,13 +23,6 @@
 	bootph-pre-ram;
 };
 
-&sms {
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-pre-ram;
-	};
-};
-
 #ifdef CONFIG_TARGET_J784S4_A72_EVM
 
 #define SPL_AM69_SK_DTB "spl/dts/ti/k3-am69-sk.dtb"

arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi

@@ -57,10 +57,6 @@
 
 &dmsc {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &k3_pds {

arch/arm/dts/k3-j721e-beagleboneai64-u-boot.dtsi

@@ -92,10 +92,6 @@
 
 &dmsc {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &k3_pds {

arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi

@@ -47,10 +47,6 @@
 
 &dmsc {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &k3_pds {

arch/arm/dts/k3-j721e-sk-u-boot.dtsi

@@ -47,10 +47,6 @@
 
 &dmsc {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &k3_pds {

arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi

@@ -51,10 +51,6 @@
 
 &sms {
 	bootph-all;
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-all;
-	};
 };
 
 &main_pmx0 {

arch/arm/dts/k3-j784s4-evm-u-boot.dtsi

@@ -22,10 +22,3 @@
 		    "tchanrt", "rflow";
 	bootph-pre-ram;
 };
-
-&sms {
-	k3_sysreset: sysreset-controller {
-		compatible = "ti,sci-sysreset";
-		bootph-pre-ram;
-	};
-};

doc/device-tree-bindings/sysreset/ti,sci-sysreset.txt

@@ -1,29 +0,0 @@
-Texas Instruments TI SCI System Reset Controller
-================================================
-
-Some TI SoCs contain a system controller (like the SYSFW, etc...) that is
-responsible for controlling the state of the IPs that are present.
-Communication between the host processor running an OS and the system
-controller happens through a protocol known as TI SCI [1].
-
-[1] http://processors.wiki.ti.com/index.php/TISCI
-
-System Reset Controller Node
-============================
-The sysreset controller node represents the reset for the overall SoC
-which is managed by the SYSFW. Because this relies on the TI SCI protocol
-to communicate with the SYSFW it must be a child of the sysfw node.
-
-Required Properties:
---------------------
- - compatible: Must be "ti,sci-sysreset"
-
-Example (AM65x):
-----------------
-	sysfw: sysfw {
-		compatible = "ti,am654-system-controller";
-		...
-		k3_sysreset: sysreset-controller {
-			compatible = "ti,sci-sysreset";
-		};
-	};