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spi: atmel: Drop atmel_spi.h
atmel_spi.h has register offsets, and atmel_spi_slave structure, move it into .c file for better readability and drop atmel_spi.h Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Wenyou Yang <wenyouya@gmail.com>
This commit is contained in:
parent
7b09477873
commit
37434db29b
2 changed files with 88 additions and 93 deletions
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@ -22,12 +22,91 @@
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#include <asm/gpio.h>
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#include <asm/gpio.h>
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#endif
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#endif
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#include "atmel_spi.h"
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DECLARE_GLOBAL_DATA_PTR;
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DECLARE_GLOBAL_DATA_PTR;
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/* Register offsets */
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#define ATMEL_SPI_CR 0x0000
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#define ATMEL_SPI_MR 0x0004
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#define ATMEL_SPI_RDR 0x0008
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#define ATMEL_SPI_TDR 0x000c
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#define ATMEL_SPI_SR 0x0010
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#define ATMEL_SPI_IER 0x0014
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#define ATMEL_SPI_IDR 0x0018
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#define ATMEL_SPI_IMR 0x001c
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#define ATMEL_SPI_CSR(x) (0x0030 + 4 * (x))
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#define ATMEL_SPI_VERSION 0x00fc
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/* Bits in CR */
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#define ATMEL_SPI_CR_SPIEN BIT(0)
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#define ATMEL_SPI_CR_SPIDIS BIT(1)
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#define ATMEL_SPI_CR_SWRST BIT(7)
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#define ATMEL_SPI_CR_LASTXFER BIT(24)
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/* Bits in MR */
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#define ATMEL_SPI_MR_MSTR BIT(0)
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#define ATMEL_SPI_MR_PS BIT(1)
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#define ATMEL_SPI_MR_PCSDEC BIT(2)
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#define ATMEL_SPI_MR_FDIV BIT(3)
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#define ATMEL_SPI_MR_MODFDIS BIT(4)
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#define ATMEL_SPI_MR_WDRBT BIT(5)
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#define ATMEL_SPI_MR_LLB BIT(7)
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#define ATMEL_SPI_MR_PCS(x) (((x) & 15) << 16)
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#define ATMEL_SPI_MR_DLYBCS(x) ((x) << 24)
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/* Bits in RDR */
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#define ATMEL_SPI_RDR_RD(x) (x)
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#define ATMEL_SPI_RDR_PCS(x) ((x) << 16)
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/* Bits in TDR */
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#define ATMEL_SPI_TDR_TD(x) (x)
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#define ATMEL_SPI_TDR_PCS(x) ((x) << 16)
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#define ATMEL_SPI_TDR_LASTXFER BIT(24)
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/* Bits in SR/IER/IDR/IMR */
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#define ATMEL_SPI_SR_RDRF BIT(0)
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#define ATMEL_SPI_SR_TDRE BIT(1)
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#define ATMEL_SPI_SR_MODF BIT(2)
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#define ATMEL_SPI_SR_OVRES BIT(3)
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#define ATMEL_SPI_SR_ENDRX BIT(4)
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#define ATMEL_SPI_SR_ENDTX BIT(5)
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#define ATMEL_SPI_SR_RXBUFF BIT(6)
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#define ATMEL_SPI_SR_TXBUFE BIT(7)
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#define ATMEL_SPI_SR_NSSR BIT(8)
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#define ATMEL_SPI_SR_TXEMPTY BIT(9)
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#define ATMEL_SPI_SR_SPIENS BIT(16)
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/* Bits in CSRx */
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#define ATMEL_SPI_CSR_CPOL BIT(0)
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#define ATMEL_SPI_CSR_NCPHA BIT(1)
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#define ATMEL_SPI_CSR_CSAAT BIT(3)
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#define ATMEL_SPI_CSR_BITS(x) ((x) << 4)
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#define ATMEL_SPI_CSR_SCBR(x) ((x) << 8)
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#define ATMEL_SPI_CSR_SCBR_MAX GENMASK(7, 0)
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#define ATMEL_SPI_CSR_DLYBS(x) ((x) << 16)
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#define ATMEL_SPI_CSR_DLYBCT(x) ((x) << 24)
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/* Bits in VERSION */
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#define ATMEL_SPI_VERSION_REV(x) ((x) & 0xfff)
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#define ATMEL_SPI_VERSION_MFN(x) ((x) << 16)
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/* Constants for CSRx:BITS */
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#define ATMEL_SPI_BITS_8 0
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#define ATMEL_SPI_BITS_9 1
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#define ATMEL_SPI_BITS_10 2
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#define ATMEL_SPI_BITS_11 3
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#define ATMEL_SPI_BITS_12 4
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#define ATMEL_SPI_BITS_13 5
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#define ATMEL_SPI_BITS_14 6
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#define ATMEL_SPI_BITS_15 7
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#define ATMEL_SPI_BITS_16 8
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#define MAX_CS_COUNT 4
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#define MAX_CS_COUNT 4
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struct atmel_spi_slave {
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void *regs;
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u32 mr;
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};
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struct atmel_spi_platdata {
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struct atmel_spi_platdata {
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struct at91_spi *regs;
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struct at91_spi *regs;
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};
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};
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@ -53,19 +132,19 @@ static int atmel_spi_claim_bus(struct udevice *dev)
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u32 scbr, csrx, mode;
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u32 scbr, csrx, mode;
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scbr = (priv->bus_clk_rate + freq - 1) / freq;
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scbr = (priv->bus_clk_rate + freq - 1) / freq;
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if (scbr > ATMEL_SPI_CSRx_SCBR_MAX)
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if (scbr > ATMEL_SPI_CSR_SCBR_MAX)
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return -EINVAL;
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return -EINVAL;
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if (scbr < 1)
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if (scbr < 1)
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scbr = 1;
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scbr = 1;
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csrx = ATMEL_SPI_CSRx_SCBR(scbr);
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csrx = ATMEL_SPI_CSR_SCBR(scbr);
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csrx |= ATMEL_SPI_CSRx_BITS(ATMEL_SPI_BITS_8);
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csrx |= ATMEL_SPI_CSR_BITS(ATMEL_SPI_BITS_8);
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if (!(priv->mode & SPI_CPHA))
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if (!(priv->mode & SPI_CPHA))
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csrx |= ATMEL_SPI_CSRx_NCPHA;
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csrx |= ATMEL_SPI_CSR_NCPHA;
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if (priv->mode & SPI_CPOL)
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if (priv->mode & SPI_CPOL)
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csrx |= ATMEL_SPI_CSRx_CPOL;
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csrx |= ATMEL_SPI_CSR_CPOL;
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writel(csrx, ®_base->csr[cs]);
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writel(csrx, ®_base->csr[cs]);
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@ -1,84 +0,0 @@
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/*
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* Register definitions for the Atmel AT32/AT91 SPI Controller
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*/
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/* Register offsets */
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#define ATMEL_SPI_CR 0x0000
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#define ATMEL_SPI_MR 0x0004
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#define ATMEL_SPI_RDR 0x0008
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#define ATMEL_SPI_TDR 0x000c
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#define ATMEL_SPI_SR 0x0010
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#define ATMEL_SPI_IER 0x0014
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#define ATMEL_SPI_IDR 0x0018
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#define ATMEL_SPI_IMR 0x001c
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#define ATMEL_SPI_CSR(x) (0x0030 + 4 * (x))
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#define ATMEL_SPI_VERSION 0x00fc
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/* Bits in CR */
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#define ATMEL_SPI_CR_SPIEN BIT(0)
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#define ATMEL_SPI_CR_SPIDIS BIT(1)
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#define ATMEL_SPI_CR_SWRST BIT(7)
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#define ATMEL_SPI_CR_LASTXFER BIT(24)
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/* Bits in MR */
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#define ATMEL_SPI_MR_MSTR BIT(0)
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#define ATMEL_SPI_MR_PS BIT(1)
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#define ATMEL_SPI_MR_PCSDEC BIT(2)
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#define ATMEL_SPI_MR_FDIV BIT(3)
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#define ATMEL_SPI_MR_MODFDIS BIT(4)
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#define ATMEL_SPI_MR_WDRBT BIT(5)
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#define ATMEL_SPI_MR_LLB BIT(7)
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#define ATMEL_SPI_MR_PCS(x) (((x) & 15) << 16)
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#define ATMEL_SPI_MR_DLYBCS(x) ((x) << 24)
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/* Bits in RDR */
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#define ATMEL_SPI_RDR_RD(x) (x)
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#define ATMEL_SPI_RDR_PCS(x) ((x) << 16)
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/* Bits in TDR */
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#define ATMEL_SPI_TDR_TD(x) (x)
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#define ATMEL_SPI_TDR_PCS(x) ((x) << 16)
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#define ATMEL_SPI_TDR_LASTXFER BIT(24)
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/* Bits in SR/IER/IDR/IMR */
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#define ATMEL_SPI_SR_RDRF BIT(0)
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#define ATMEL_SPI_SR_TDRE BIT(1)
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#define ATMEL_SPI_SR_MODF BIT(2)
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#define ATMEL_SPI_SR_OVRES BIT(3)
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#define ATMEL_SPI_SR_ENDRX BIT(4)
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#define ATMEL_SPI_SR_ENDTX BIT(5)
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#define ATMEL_SPI_SR_RXBUFF BIT(6)
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#define ATMEL_SPI_SR_TXBUFE BIT(7)
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#define ATMEL_SPI_SR_NSSR BIT(8)
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#define ATMEL_SPI_SR_TXEMPTY BIT(9)
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#define ATMEL_SPI_SR_SPIENS BIT(16)
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/* Bits in CSRx */
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#define ATMEL_SPI_CSRx_CPOL BIT(0)
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#define ATMEL_SPI_CSRx_NCPHA BIT(1)
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#define ATMEL_SPI_CSRx_CSAAT BIT(3)
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#define ATMEL_SPI_CSRx_BITS(x) ((x) << 4)
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#define ATMEL_SPI_CSRx_SCBR(x) ((x) << 8)
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#define ATMEL_SPI_CSRx_SCBR_MAX GENMASK(7, 0)
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#define ATMEL_SPI_CSRx_DLYBS(x) ((x) << 16)
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#define ATMEL_SPI_CSRx_DLYBCT(x) ((x) << 24)
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/* Bits in VERSION */
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#define ATMEL_SPI_VERSION_REV(x) ((x) & 0xfff)
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#define ATMEL_SPI_VERSION_MFN(x) ((x) << 16)
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/* Constants for CSRx:BITS */
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#define ATMEL_SPI_BITS_8 0
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#define ATMEL_SPI_BITS_9 1
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#define ATMEL_SPI_BITS_10 2
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#define ATMEL_SPI_BITS_11 3
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#define ATMEL_SPI_BITS_12 4
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#define ATMEL_SPI_BITS_13 5
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#define ATMEL_SPI_BITS_14 6
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#define ATMEL_SPI_BITS_15 7
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#define ATMEL_SPI_BITS_16 8
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struct atmel_spi_slave {
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void *regs;
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u32 mr;
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};
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