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rockchip: spl: veyron speedy boots from SPI

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Apparently speedy was forgotten from this list of veyron devices.

Fixes: 49105fb7ed ("rockchip: add common spl board file")
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Urja Rannikko 2020-05-13 19:15:20 +00:00 • committed by Kever Yang
parent 69cd0c463d
commit 353ad95aa6
1 changed files with 2 additions and 1 deletions
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3
arch/arm/mach-rockchip/spl.c
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@ -53,7 +53,8 @@ u32 spl_boot_device(void)
#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
return BOOT_DEVICE_SPI; return BOOT_DEVICE_SPI;
#endif #endif
if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))