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arm: pxa: Remove CONFIG_CPU_PXA25X

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There are no platforms that set this, remove the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini 2022-05-25 16:13:48 -04:00
parent 1cb7d77812
commit 3135ba642f
13 changed files with 6 additions and 2492 deletions
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1
arch/arm/cpu/pxa/Makefile
View file

@ -5,7 +5,6 @@
extra-y = start.o
obj-$(CONFIG_CPU_PXA25X) += pxa2xx.o
obj-$(CONFIG_CPU_PXA27X) += pxa2xx.o
obj-y += cpuinfo.o

6
arch/arm/cpu/pxa/cpuinfo.c
View file

@ -11,12 +11,6 @@
#include <errno.h>
#include <linux/compiler.h>
#ifdef CONFIG_CPU_PXA25X
#if ((CONFIG_SYS_INIT_SP_ADDR) != 0xfffff800)
#error "Init SP address must be set to 0xfffff800 for PXA250"
#endif
#endif
#define CPU_MASK_PXA_PRODID 0x000003f0
#define CPU_MASK_PXA_REVID 0x0000000f

111
arch/arm/cpu/pxa/start.S
View file

@ -49,9 +49,6 @@ reset:
bl cpu_init_crit
#endif
#ifdef CONFIG_CPU_PXA25X
bl lock_cache_for_stack
#endif
#ifdef CONFIG_CPU_PXA27X
/*
* enable clock for SRAM
@ -67,20 +64,7 @@ reset:
.globl c_runtime_cpu_setup
c_runtime_cpu_setup:
#ifdef CONFIG_CPU_PXA25X
/*
* Unlock (actually, disable) the cache now that board_init_f
* is done. We could do this earlier but we would need to add
* a new C runtime hook, whereas c_runtime_cpu_setup already
* exists.
* As this routine is just a call to cpu_init_crit, let us
* tail-optimize and do a simple branch here.
*/
b cpu_init_crit
#else
bx lr
#endif
/*
*************************************************************************
@ -92,7 +76,7 @@ c_runtime_cpu_setup:
*
*************************************************************************
*/
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || defined(CONFIG_CPU_PXA25X)
#if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT)
cpu_init_crit:
/*
* flush v4 I/D caches
@ -111,95 +95,4 @@ cpu_init_crit:
mcr p15, 0, r0, c1, c0, 0
mov pc, lr /* back to my caller */
#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) || CONFIG_CPU_PXA25X */
/*
* Enable MMU to use DCache as DRAM.
*
* This is useful on PXA25x and PXA26x in early bootstages, where there is no
* other possible memory available to hold stack.
*/
#ifdef CONFIG_CPU_PXA25X
.macro CPWAIT reg
mrc p15, 0, \reg, c2, c0, 0
mov \reg, \reg
sub pc, pc, #4
.endm
lock_cache_for_stack:
/* Domain access -- enable for all CPs */
ldr r0, =0x0000ffff
mcr p15, 0, r0, c3, c0, 0
/* Point TTBR to MMU table */
ldr r0, =mmutable
mcr p15, 0, r0, c2, c0, 0
/* Kick in MMU, ICache, DCache, BTB */
mrc p15, 0, r0, c1, c0, 0
bic r0, #0x1b00
bic r0, #0x0087
orr r0, #0x1800
orr r0, #0x0005
mcr p15, 0, r0, c1, c0, 0
CPWAIT r0
/* Unlock Icache, Dcache */
mcr p15, 0, r0, c9, c1, 1
mcr p15, 0, r0, c9, c2, 1
/* Flush Icache, Dcache, BTB */
mcr p15, 0, r0, c7, c7, 0
/* Unlock I-TLB, D-TLB */
mcr p15, 0, r0, c10, c4, 1
mcr p15, 0, r0, c10, c8, 1
/* Flush TLB */
mcr p15, 0, r0, c8, c7, 0
/* Allocate 4096 bytes of Dcache as RAM */
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
mov r4, #0x00
mov r5, #0x00
mov r2, #0x01
mcr p15, 0, r0, c9, c2, 0
CPWAIT r0
/* 128 lines reserved (128 x 32bytes = 4096 bytes total) */
mov r0, #128
ldr r1, =0xfffff000
alloc:
mcr p15, 0, r1, c7, c2, 5
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
strd r4, [r1], #8
strd r4, [r1], #8
strd r4, [r1], #8
strd r4, [r1], #8
subs r0, #0x01
bne alloc
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
mov r2, #0x00
mcr p15, 0, r2, c9, c2, 0
CPWAIT r0
mov pc, lr
.section .mmutable, "a"
mmutable:
.align 14
/* 0x00000000 - 0xffe00000 : 1:1, uncached mapping */
.set __base, 0
.rept 0xfff
.word (__base << 20) | 0xc12
.set __base, __base + 1
.endr
/* 0xfff00000 : 1:1, cached mapping */
.word (0xfff << 20) | 0x1c1e
#endif /* CONFIG_CPU_PXA25X */
#endif /* !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) */

2
arch/arm/include/asm/arch-pxa/config.h
View file

@ -13,8 +13,6 @@
*/
#if defined(CONFIG_CPU_PXA27X) || defined(CONFIG_CPU_MONAHANS)
#define CONFIG_SYS_TIMER_RATE 3250000
#elif defined(CONFIG_CPU_PXA25X)
#define CONFIG_SYS_TIMER_RATE 3686400
#else
#error "Timer frequency unknown - please config PXA CPU type"
#endif

1
arch/arm/include/asm/config.h
View file

@ -11,7 +11,6 @@
#if defined(CONFIG_ARCH_LS1021A) || \
defined(CONFIG_CPU_PXA27X) || \
defined(CONFIG_CPU_MONAHANS) || \
defined(CONFIG_CPU_PXA25X) || \
defined(CONFIG_FSL_LAYERSCAPE)
#include <asm/arch/config.h>
#endif

7
drivers/mmc/pxa_mmc_gen.c
View file

@ -20,12 +20,7 @@
#include <mmc.h>
/* PXAMMC Generic default config for various CPUs */
#if defined(CONFIG_CPU_PXA25X)
#define PXAMMC_FIFO_SIZE 1
#define PXAMMC_MIN_SPEED 312500
#define PXAMMC_MAX_SPEED 20000000
#define PXAMMC_HOST_CAPS (0)
#elif defined(CONFIG_CPU_PXA27X)
#if defined(CONFIG_CPU_PXA27X)
#define PXAMMC_CRC_SKIP
#define PXAMMC_FIFO_SIZE 32
#define PXAMMC_MIN_SPEED 304000

152
drivers/net/smc91111.h
View file

@ -66,155 +66,7 @@ struct smc91111_priv{
#define SMC_IO_EXTENT 16
#ifdef CONFIG_CPU_PXA25X
#ifdef CONFIG_XSENGINE
#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+((r)<<1))))
#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1))))
#define SMC_inb(a,p) ({ \
unsigned int __p = (unsigned int)((a)->iobase + ((p)<<1)); \
unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \
if (__p & 2) __v >>= 8; \
else __v &= 0xff; \
__v; })
#else
#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
#define SMC_inb(a,p) ({ \
unsigned int __p = (unsigned int)((a)->iobase + (p)); \
unsigned int __v = *(volatile unsigned short *)((__p) & ~1); \
if (__p & 1) __v >>= 8; \
else __v &= 0xff; \
__v; })
#endif
#ifdef CONFIG_XSENGINE
#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r<<1))) = d)
#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r<<1))) = d)
#else
#define SMC_outl(a,d,r) (*((volatile dword *)((a)->iobase+(r))) = d)
#define SMC_outw(a,d,r) (*((volatile word *)((a)->iobase+(r))) = d)
#endif
#define SMC_outb(a,d,r) ({ word __d = (byte)(d); \
word __w = SMC_inw((a),(r)&~1); \
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
__w |= ((r)&1) ? __d<<8 : __d; \
SMC_outw((a),__w,(r)&~1); \
})
#define SMC_outsl(a,r,b,l) ({ int __i; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
SMC_outl((a), *(__b2 + __i), r); \
} \
})
#define SMC_outsw(a,r,b,l) ({ int __i; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
SMC_outw((a), *(__b2 + __i), r); \
} \
})
#define SMC_insl(a,r,b,l) ({ int __i ; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
*(__b2 + __i) = SMC_inl((a),(r)); \
SMC_inl((a),0); \
}; \
})
#define SMC_insw(a,r,b,l) ({ int __i ; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
*(__b2 + __i) = SMC_inw((a),(r)); \
SMC_inw((a),0); \
}; \
})
#define SMC_insb(a,r,b,l) ({ int __i ; \
byte *__b2; \
__b2 = (byte *) b; \
for (__i = 0; __i < l; __i++) { \
*(__b2 + __i) = SMC_inb((a),(r)); \
SMC_inb((a),0); \
}; \
})
#elif defined(CONFIG_LEON) /* if not CONFIG_CPU_PXA25X */
#define SMC_LEON_SWAP16(_x_) ({ word _x = (_x_); ((_x << 8) | (_x >> 8)); })
#define SMC_LEON_SWAP32(_x_) \
({ dword _x = (_x_); \
((_x << 24) | \
((0x0000FF00UL & _x) << 8) | \
((0x00FF0000UL & _x) >> 8) | \
(_x >> 24)); })
#define SMC_inl(a,r) (SMC_LEON_SWAP32((*(volatile dword *)((a)->iobase+((r)<<0)))))
#define SMC_inl_nosw(a,r) ((*(volatile dword *)((a)->iobase+((r)<<0))))
#define SMC_inw(a,r) (SMC_LEON_SWAP16((*(volatile word *)((a)->iobase+((r)<<0)))))
#define SMC_inw_nosw(a,r) ((*(volatile word *)((a)->iobase+((r)<<0))))
#define SMC_inb(a,p) ({ \
word ___v = SMC_inw((a),(p) & ~1); \
if ((p) & 1) ___v >>= 8; \
else ___v &= 0xff; \
___v; })
#define SMC_outl(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP32(d))
#define SMC_outl_nosw(a,d,r) (*(volatile dword *)((a)->iobase+((r)<<0))=(d))
#define SMC_outw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=SMC_LEON_SWAP16(d))
#define SMC_outw_nosw(a,d,r) (*(volatile word *)((a)->iobase+((r)<<0))=(d))
#define SMC_outb(a,d,r) do{ word __d = (byte)(d); \
word __w = SMC_inw((a),(r)&~1); \
__w &= ((r)&1) ? 0x00FF : 0xFF00; \
__w |= ((r)&1) ? __d<<8 : __d; \
SMC_outw((a),__w,(r)&~1); \
}while(0)
#define SMC_outsl(a,r,b,l) do{ int __i; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
SMC_outl_nosw((a), *(__b2 + __i), r); \
} \
}while(0)
#define SMC_outsw(a,r,b,l) do{ int __i; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
SMC_outw_nosw((a), *(__b2 + __i), r); \
} \
}while(0)
#define SMC_insl(a,r,b,l) do{ int __i ; \
dword *__b2; \
__b2 = (dword *) b; \
for (__i = 0; __i < l; __i++) { \
*(__b2 + __i) = SMC_inl_nosw((a),(r)); \
}; \
}while(0)
#define SMC_insw(a,r,b,l) do{ int __i ; \
word *__b2; \
__b2 = (word *) b; \
for (__i = 0; __i < l; __i++) { \
*(__b2 + __i) = SMC_inw_nosw((a),(r)); \
}; \
}while(0)
#define SMC_insb(a,r,b,l) do{ int __i ; \
byte *__b2; \
__b2 = (byte *) b; \
for (__i = 0; __i < l; __i++) { \
*(__b2 + __i) = SMC_inb((a),(r)); \
}; \
}while(0)
#elif defined(CONFIG_MS7206SE)
#if defined(CONFIG_MS7206SE)
#define SWAB7206(x) ({ word __x = x; ((__x << 8)|(__x >> 8)); })
#define SMC_inw(a, r) *((volatile word*)((a)->iobase + (r)))
#define SMC_inb(a, r) (*((volatile byte*)((a)->iobase + ((r) ^ 0x01))))
@ -244,7 +96,7 @@ struct smc91111_priv{
__b2++; \
} \
} while (0)
#else /* if not CONFIG_CPU_PXA25X and not CONFIG_LEON */
#else
#ifndef CONFIG_SMC_USE_IOFUNCS /* these macros don't work on some boards */
/*

1
drivers/serial/serial_pxa.c
View file

@ -88,7 +88,6 @@ static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index)
case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE;
case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE;
case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE;
case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE;
default:
return NULL;
}

1
drivers/usb/gadget/Makefile
View file

@ -37,7 +37,6 @@ ifdef CONFIG_USB_ETHER
obj-y += ether.o
obj-$(CONFIG_USB_ETH_RNDIS) += rndis.o
obj-$(CONFIG_CI_UDC) += ci_udc.o
obj-$(CONFIG_CPU_PXA25X) += pxa25x_udc.o
else
# Devices not related to the new gadget layer depend on CONFIG_USB_DEVICE
ifdef CONFIG_USB_DEVICE

2049
drivers/usb/gadget/pxa25x_udc.c
View file

File diff suppressed because it is too large Load diff

149
drivers/usb/gadget/pxa25x_udc.h
View file

@ -1,149 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Intel PXA25x on-chip full speed USB device controller
*
* Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
* Copyright (C) 2003 David Brownell
* Copyright (C) 2012 Lukasz Dalek <luk0104@gmail.com>
*/
#ifndef __LINUX_USB_GADGET_PXA25X_H
#define __LINUX_USB_GADGET_PXA25X_H
#include <linux/types.h>
#include <asm/arch/regs-usb.h>
/*
* Prefetching support - only ARMv5.
*/
#ifdef ARCH_HAS_PREFETCH
static inline void prefetch(const void *ptr)
{
__asm__ __volatile__(
"pld\t%a0"
:
: "p" (ptr)
: "cc");
}
#define prefetchw(ptr) prefetch(ptr)
#endif /* ARCH_HAS_PREFETCH */
/*-------------------------------------------------------------------------*/
#define UDC_REGS ((struct pxa25x_udc_regs *)PXA25X_UDC_BASE)
/*-------------------------------------------------------------------------*/
struct pxa2xx_udc_mach_info {
int (*udc_is_connected)(void); /* do we see host? */
void (*udc_command)(int cmd);
#define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */
#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */
};
struct pxa25x_udc;
struct pxa25x_ep {
struct usb_ep ep;
struct pxa25x_udc *dev;
const struct usb_endpoint_descriptor *desc;
struct list_head queue;
unsigned long pio_irqs;
unsigned short fifo_size;
u8 bEndpointAddress;
u8 bmAttributes;
unsigned stopped:1;
/* UDCCS = UDC Control/Status for this EP
* UBCR = UDC Byte Count Remaining (contents of OUT fifo)
* UDDR = UDC Endpoint Data Register (the fifo)
* DRCM = DMA Request Channel Map
*/
u32 *reg_udccs;
u32 *reg_ubcr;
u32 *reg_uddr;
};
struct pxa25x_request {
struct usb_request req;
struct list_head queue;
};
enum ep0_state {
EP0_IDLE,
EP0_IN_DATA_PHASE,
EP0_OUT_DATA_PHASE,
EP0_END_XFER,
EP0_STALL,
};
#define EP0_FIFO_SIZE 16U
#define BULK_FIFO_SIZE 64U
#define ISO_FIFO_SIZE 256U
#define INT_FIFO_SIZE 8U
struct udc_stats {
struct ep0stats {
unsigned long ops;
unsigned long bytes;
} read, write;
unsigned long irqs;
};
#ifdef CONFIG_USB_PXA25X_SMALL
/* when memory's tight, SMALL config saves code+data. */
#define PXA_UDC_NUM_ENDPOINTS 3
#endif
#ifndef PXA_UDC_NUM_ENDPOINTS
#define PXA_UDC_NUM_ENDPOINTS 16
#endif
struct pxa25x_watchdog {
unsigned running:1;
ulong period;
ulong base;
struct pxa25x_udc *udc;
void (*function)(struct pxa25x_udc *udc);
};
struct pxa25x_udc {
struct usb_gadget gadget;
struct usb_gadget_driver *driver;
struct pxa25x_udc_regs *regs;
enum ep0_state ep0state;
struct udc_stats stats;
unsigned got_irq:1,
pullup:1,
has_cfr:1,
req_pending:1,
req_std:1,
req_config:1,
active:1;
struct clk *clk;
struct pxa2xx_udc_mach_info *mach;
u64 dma_mask;
struct pxa25x_ep ep[PXA_UDC_NUM_ENDPOINTS];
struct pxa25x_watchdog watchdog;
};
/*-------------------------------------------------------------------------*/
static struct pxa25x_udc *the_controller;
/*-------------------------------------------------------------------------*/
#ifndef DEBUG
# define NOISY 0
#endif
#endif /* __LINUX_USB_GADGET_PXA25X_H */

15
include/dm/platform_data/serial_pxa.h
View file

@ -16,13 +16,6 @@
#define BTUART_INDEX 0
#define FFUART_INDEX 1
#define STUART_INDEX 2
#elif CONFIG_CPU_PXA25X
#define UART_CLK_BASE BIT(4) /* HWUART */
#define UART_CLK_REG CKEN
#define HWUART_INDEX 0
#define STUART_INDEX 1
#define FFUART_INDEX 2
#define BTUART_INDEX 3
#else /* PXA27x */
#define UART_CLK_BASE CKEN5_STUART
#define UART_CLK_REG CKEN
@ -31,14 +24,6 @@
#define BTUART_INDEX 2
#endif
/*
* Only PXA250 has HWUART, to avoid poluting the code with more macros,
* artificially introduce this.
*/
#ifndef CONFIG_CPU_PXA25X
#define HWUART_INDEX 0xff
#endif
/*
* struct pxa_serial_plat - information about a PXA port
*

3
include/lcd.h
View file

@ -40,8 +40,7 @@ ulong lcd_setmem(ulong addr);
*/
void lcd_set_flush_dcache(int flush);
#if defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
defined CONFIG_CPU_MONAHANS
#if defined(CONFIG_CPU_PXA27X) || defined CONFIG_CPU_MONAHANS
#include <pxa_lcd.h>
#elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
#include <atmel_lcd.h>