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imx6: drop duplicated bss memset and board_init_r() call
bss section is cleared in crt0.S. board_init_r() is also entered from crt0 code. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Marek Vasut <marex@denx.de> Cc: Lukasz Majewski <lukma@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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8 changed files with 0 additions and 42 deletions
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@ -151,10 +151,4 @@ void board_init_f(ulong dummy)
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/* configure MMDC for SDRAM width/size and per-model calibration */
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/* configure MMDC for SDRAM width/size and per-model calibration */
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ot1200_spl_dram_init();
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ot1200_spl_dram_init();
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* load/boot image from boot device */
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board_init_r(NULL, 0);
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}
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}
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@ -336,9 +336,6 @@ void board_init_f(ulong dummy)
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puts("!!!ERROR!!! DRAM detection failed!!!\n");
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puts("!!!ERROR!!! DRAM detection failed!!!\n");
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hang();
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hang();
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}
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}
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memset(__bss_start, 0, __bss_end - __bss_start);
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board_init_r(NULL, 0);
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}
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}
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void board_boot_order(u32 *spl_boot_list)
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void board_boot_order(u32 *spl_boot_list)
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@ -384,10 +384,4 @@ void board_init_f(ulong dummy)
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/* DDR initialization */
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/* DDR initialization */
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spl_dram_init();
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spl_dram_init();
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* load/boot image from boot device */
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board_init_r(NULL, 0);
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}
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}
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@ -626,9 +626,6 @@ void board_init_f(ulong dummy)
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spl_dram_init(8 << ventana_info.sdram_width,
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spl_dram_init(8 << ventana_info.sdram_width,
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16 << ventana_info.sdram_size,
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16 << ventana_info.sdram_size,
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board_model);
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board_model);
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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}
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}
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void board_boot_order(u32 *spl_boot_list)
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void board_boot_order(u32 *spl_boot_list)
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@ -596,10 +596,4 @@ void board_init_f(ulong dummy)
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udelay(100);
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udelay(100);
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mmdc_do_write_level_calibration(&novena_ddr_info);
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mmdc_do_write_level_calibration(&novena_ddr_info);
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mmdc_do_dqs_calibration(&novena_ddr_info);
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mmdc_do_dqs_calibration(&novena_ddr_info);
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* load/boot image from boot device */
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board_init_r(NULL, 0);
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}
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}
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@ -296,11 +296,5 @@ void board_init_f(ulong dummy)
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/* DDR initialization */
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/* DDR initialization */
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spl_dram_init();
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spl_dram_init();
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* load/boot image from boot device */
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board_init_r(NULL, 0);
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}
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}
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#endif
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#endif
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@ -252,11 +252,5 @@ void board_init_f(ulong dummy)
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/* DDR initialization */
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/* DDR initialization */
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spl_dram_init();
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spl_dram_init();
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* load/boot image from boot device */
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board_init_r(NULL, 0);
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}
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}
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#endif
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#endif
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@ -300,11 +300,5 @@ void board_init_f(ulong dummy)
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/* DDR initialization */
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/* DDR initialization */
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spl_dram_init();
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spl_dram_init();
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/* Clear the BSS. */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* load/boot image from boot device */
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board_init_r(NULL, 0);
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}
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}
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#endif
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#endif
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