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armv7: cache maintenance operations for armv7

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- Add a framework for layered cache maintenance
	- separate out SOC specific outer cache maintenance from
	  maintenance of caches known to CPU

- Add generic ARMv7 cache maintenance operations that affect all
  caches known to ARMv7 CPUs. For instance in Cortex-A8 these
  opertions will affect both L1 and L2 caches. In Cortex-A9
  these will affect only L1 cache

- D-cache operations supported:
	- Invalidate entire D-cache
	- Invalidate D-cache range
	- Flush(clean & invalidate) entire D-cache
	- Flush D-cache range
- I-cache operations supported:
	- Invalidate entire I-cache

- Add maintenance functions for TLB, branch predictor array etc.

- Enable -march=armv7-a so that armv7 assembly instructions can be
  used

Signed-off-by: Aneesh V <aneesh@ti.com>
This commit is contained in:
Aneesh V 2011-06-16 23:30:47 +00:00 • committed by Albert ARIBAUD
parent 4c93da7c39
commit 2c451f7831
6 changed files with 527 additions and 2 deletions
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5
include/common.h
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@ -413,6 +413,7 @@ void icache_disable(void);
int dcache_status (void);
void dcache_enable (void);
void dcache_disable(void);
void mmu_disable(void);
void relocate_code (ulong, gd_t *, ulong) __attribute__ ((noreturn));
ulong get_endaddr (void);
void trap_init (ulong);
@ -611,9 +612,11 @@ ulong video_setmem (ulong);
/* arch/$(ARCH)/lib/cache.c */
void flush_cache (unsigned long, unsigned long);
void flush_dcache_all(void);
void flush_dcache_range(unsigned long start, unsigned long stop);
void invalidate_dcache_range(unsigned long start, unsigned long stop);
void invalidate_dcache_all(void);
void invalidate_icache_all(void);
/* arch/$(ARCH)/lib/ticks.S */
unsigned long long get_ticks(void);