board: rockchip: add Powkiddy X55

The Powkiddy X55 is a Rockchip RK3566 based handheld gaming device.
UART, ADC, eMMC, and SDMMC are tested to work in U-Boot and this
successfully boots mainline Linux.

Kernel commit:
e99adc97e21a ("arm64: dts: rockchip: Add Powkiddy X55")

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi

@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+	chosen {
+		u-boot,spl-boot-order = &sdmmc0, &sdhci;
+	};
+};

arch/arm/mach-rockchip/rk3568/Kconfig

@@ -22,6 +22,11 @@ config TARGET_ODROID_M1_RK3568
 	help
 	  Hardkernel ODROID-M1 single board computer with a RK3568B2 SoC.
 
+config TARGET_POWKIDDY_X55_RK3566
+	bool "Powkiddy X55"
+	help
+	  Powkiddy X55 handheld gaming console with an RK3566 SoC.
+
 config TARGET_QUARTZ64_RK3566
 	bool "Pine64 Quartz64"
 	help
@@ -48,5 +53,6 @@ source "board/rockchip/evb_rk3568/Kconfig"
 source "board/anbernic/rgxx3_rk3566/Kconfig"
 source "board/hardkernel/odroid_m1/Kconfig"
 source "board/pine64/quartz64_rk3566/Kconfig"
+source "board/powkiddy/x55/Kconfig"
 
 endif

board/powkiddy/x55/Kconfig

@@ -0,0 +1,15 @@
+if TARGET_POWKIDDY_X55_RK3566
+
+config SYS_BOARD
+	default "x55"
+
+config SYS_VENDOR
+	default "powkiddy"
+
+config SYS_CONFIG_NAME
+	default "powkiddy-x55-rk3566"
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+
+endif

board/powkiddy/x55/MAINTAINERS

@@ -0,0 +1,7 @@
+X55
+M:	Chris Morgan <macromorgan@hotmail.com>
+S:	Maintained
+F:	board/powkiddy/x55
+F:	include/configs/powkiddy-x55-rk3566.h
+F:	configs/powkiddy-x55-rk3566_defconfig
+F:	arch/arm/dts/rk3566-powkiddy-x55-u-boot.dtsi

board/powkiddy/x55/Makefile

@@ -0,0 +1,6 @@
+# SPDX-License-Identifier:     GPL-2.0+
+#
+# Copyright (c) 2023 Chris Morgan <macromorgan@hotmail.com>
+#
+
+obj-y += x55.o

board/powkiddy/x55/x55.c

@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2023 Chris Morgan <macromorgan@hotmail.com>
+ */
+
+#include <asm/io.h>
+
+#define GPIO4_BASE		0xfe770000
+#define GPIO_SWPORT_DR_L	0x0000
+#define GPIO_SWPORT_DDR_L	0x0008
+#define GPIO_B4			BIT(12)
+#define GPIO_B5			BIT(13)
+#define GPIO_B6			BIT(14)
+
+#define GPIO_WRITEMASK(bits)	((bits) << 16)
+
+/*
+ * Start LED very early so user knows device is on. Set color
+ * to red.
+ */
+void spl_board_init(void)
+{
+	/* Set GPIO4_B4, GPIO4_B5, and GPIO4_B6 to output. */
+	writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | \
+	       (GPIO_B6 | GPIO_B5 | GPIO_B4),
+	       (GPIO4_BASE + GPIO_SWPORT_DDR_L));
+	/* Set GPIO4_B5 and GPIO4_B6 to 0 and GPIO4_B4 to 1. */
+	writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | GPIO_B4,
+	       (GPIO4_BASE + GPIO_SWPORT_DR_L));
+}
+
+int rk_board_late_init(void)
+{
+	/* Turn off red LED and turn on orange LED. */
+	writel(GPIO_WRITEMASK(GPIO_B6 | GPIO_B5 | GPIO_B4) | GPIO_B6,
+	       (GPIO4_BASE + GPIO_SWPORT_DR_L));
+
+	return 0;
+}

configs/powkiddy-x55-rk3566_defconfig

@@ -0,0 +1,58 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-powkiddy-x55"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_SERIAL=y
+CONFIG_DEBUG_UART_BASE=0xFE660000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-powkiddy-x55.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_ERRNO_STR=y

doc/board/rockchip/rockchip.rst

@@ -104,6 +104,7 @@ List of mainline supported Rockchip boards:
      - Pine64 SOQuartz on Blade (soquartz-blade-rk3566)
      - Pine64 SOQuartz on CM4-IO (soquartz-cm4-rk3566)
      - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566)
+     - Powkiddy X55 (powkiddy-x55-rk3566)
      - Radxa CM3 IO Board (radxa-cm3-io-rk3566)
 
 * rk3568

include/configs/powkiddy-x55-rk3566.h

@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __POWKIDDY_X55_RK3566_H
+#define __POWKIDDY_X55_RK3566_H
+
+#include <configs/rk3568_common.h>
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+			"stdout=serial,vidconsole\0" \
+			"stderr=serial,vidconsole\0"
+
+#endif