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arm: socfpga: arria10: add option to reprogram the FPGA every reboot

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Add Kconfig that enables FPGA reprogramming with warm boot on Arria 10.
This option allows to change the bitstream on the filesystem and apply
changes with warm reboot without the need for a power cycle.

Signed-off-by: Michał Barnaś <barnas@google.com>
This commit is contained in:
Michał Barnaś 2024-03-19 18:18:13 +00:00 • committed by Tien Fong Chee
parent b03b49046a
commit 2b8eabbaf2
2 changed files with 14 additions and 2 deletions
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8
arch/arm/mach-socfpga/Kconfig
View file

@ -90,6 +90,14 @@ config TARGET_SOCFPGA_ARRIA10
imply FPGA_SOCFPGA
imply SPL_USE_TINY_PRINTF
config SOCFPGA_ARRIA10_ALWAYS_REPROGRAM
bool "Always reprogram Arria 10 FPGA"
depends on TARGET_SOCFPGA_ARRIA10
help
Arria 10 FPGA is only programmed during the cold boot.
This option forces the FPGA to be reprogrammed every reboot,
allowing to change the bitstream and apply it with warm reboot.
config TARGET_SOCFPGA_CYCLONE5
bool
select TARGET_SOCFPGA_GEN5

8
arch/arm/mach-socfpga/spl_a10.c
View file

@ -122,7 +122,10 @@ void spl_board_init(void)
arch_early_init_r();
/* If the full FPGA is already loaded, ie.from EPCQ, config fpga pins */
if (is_fpgamgr_user_mode()) {
if ((IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
is_regular_boot_valid()) ||
(!IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) &&
is_fpgamgr_user_mode())) {
ret = config_pins(gd->fdt_blob, "shared");
if (ret)
return;
@ -130,7 +133,8 @@ void spl_board_init(void)
ret = config_pins(gd->fdt_blob, "fpga");
if (ret)
return;
} else if (!is_fpgamgr_early_user_mode()) {
} else if (IS_ENABLED(CONFIG_SOCFPGA_ARRIA10_ALWAYS_REPROGRAM) ||
!is_fpgamgr_early_user_mode()) {
/* Program IOSSM(early IO release) or full FPGA */
fpgamgr_program(buf, FPGA_BUFSIZ, 0);