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Merge branch 'master' of git://git.denx.de/u-boot-mmc

Browse source 
* 'master' of git://git.denx.de/u-boot-mmc:
  mmc: make mmc_send_status() more reliable
  mmc: fix card busy polling
  Tegra: mmc: Fixed handling of interrupts in timeouts.
  omap_hsmmc: Wait for CMDI to be clear
This commit is contained in:
Wolfgang Denk 2012-02-17 23:54:46 +01:00
commit 2acca35ce4
8 changed files with 31 additions and 22 deletions
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2
arch/arm/include/asm/arch-am33xx/mmc_host_def.h
View file

@ -97,7 +97,7 @@ typedef struct hsmmc {
#define INDEX_MASK (0x3f << 24) #define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24) #define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1) #define DATI_MASK (0x1 << 1)
#define DATI_CMDDIS (0x1 << 1) #define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1) #define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1) #define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ #define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/

2
arch/arm/include/asm/arch-omap3/mmc_host_def.h
View file

@ -129,7 +129,7 @@ struct hsmmc {
#define INDEX_MASK (0x3f << 24) #define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24) #define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1) #define DATI_MASK (0x1 << 1)
#define DATI_CMDDIS (0x1 << 1) #define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1) #define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1) #define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ #define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/

2
arch/arm/include/asm/arch-omap4/mmc_host_def.h
View file

@ -107,7 +107,7 @@ struct hsmmc {
#define INDEX_MASK (0x3f << 24) #define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24) #define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1) #define DATI_MASK (0x1 << 1)
#define DATI_CMDDIS (0x1 << 1) #define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1) #define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1) #define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ #define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/

2
arch/arm/include/asm/arch-omap5/mmc_host_def.h
View file

@ -107,7 +107,7 @@ struct hsmmc {
#define INDEX_MASK (0x3f << 24) #define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24) #define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1) #define DATI_MASK (0x1 << 1)
#define DATI_CMDDIS (0x1 << 1) #define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1) #define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1) #define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ #define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/

32
drivers/mmc/mmc.c
View file

@ -108,7 +108,7 @@ int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
int mmc_send_status(struct mmc *mmc, int timeout) int mmc_send_status(struct mmc *mmc, int timeout)
{ {
struct mmc_cmd cmd; struct mmc_cmd cmd;
int err; int err, retries = 5;
#ifdef CONFIG_MMC_TRACE #ifdef CONFIG_MMC_TRACE
int status; int status;
#endif #endif
@ -121,17 +121,21 @@ int mmc_send_status(struct mmc *mmc, int timeout)
do { do {
err = mmc_send_cmd(mmc, &cmd, NULL); err = mmc_send_cmd(mmc, &cmd, NULL);
if (err) if (!err) {
return err; if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
else if (cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
MMC_STATE_PRG)
break; break;
else if (cmd.response[0] & MMC_STATUS_MASK) {
printf("Status Error: 0x%08X\n",
cmd.response[0]);
return COMM_ERR;
}
} else if (--retries < 0)
return err;
udelay(1000); udelay(1000);
if (cmd.response[0] & MMC_STATUS_MASK) {
printf("Status Error: 0x%08X\n", cmd.response[0]);
return COMM_ERR;
}
} while (timeout--); } while (timeout--);
#ifdef CONFIG_MMC_TRACE #ifdef CONFIG_MMC_TRACE
@ -305,10 +309,11 @@ mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
printf("mmc fail to send stop cmd\n"); printf("mmc fail to send stop cmd\n");
return 0; return 0;
} }
}
/* Waiting for the ready status */ /* Waiting for the ready status */
mmc_send_status(mmc, timeout); if (mmc_send_status(mmc, timeout))
} return 0;
return blkcnt; return blkcnt;
} }
@ -341,7 +346,6 @@ int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, lbaint_t blkcnt)
{ {
struct mmc_cmd cmd; struct mmc_cmd cmd;
struct mmc_data data; struct mmc_data data;
int timeout = 1000;
if (blkcnt > 1) if (blkcnt > 1)
cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
@ -373,9 +377,6 @@ int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, lbaint_t blkcnt)
printf("mmc fail to send stop cmd\n"); printf("mmc fail to send stop cmd\n");
return 0; return 0;
} }
/* Waiting for the ready status */
mmc_send_status(mmc, timeout);
} }
return blkcnt; return blkcnt;
@ -610,7 +611,8 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
ret = mmc_send_cmd(mmc, &cmd, NULL); ret = mmc_send_cmd(mmc, &cmd, NULL);
/* Waiting for the ready status */ /* Waiting for the ready status */
mmc_send_status(mmc, timeout); if (!ret)
ret = mmc_send_status(mmc, timeout);
return ret; return ret;

5
drivers/mmc/omap_hsmmc.c
View file

@ -198,9 +198,10 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
ulong start; ulong start;
start = get_timer(0); start = get_timer(0);
while ((readl(&mmc_base->pstate) & DATI_MASK) == DATI_CMDDIS) { while ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) {
if (get_timer(0) - start > MAX_RETRY_MS) { if (get_timer(0) - start > MAX_RETRY_MS) {
printf("%s: timedout waiting for cmddis!\n", __func__); printf("%s: timedout waiting on cmd inhibit to clear\n",
__func__);
return TIMEOUT; return TIMEOUT;
} }
} }

4
drivers/mmc/tegra2_mmc.c
View file

@ -227,16 +227,19 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
if (i == retry) { if (i == retry) {
printf("%s: waiting for status update\n", __func__); printf("%s: waiting for status update\n", __func__);
writel(mask, &host->reg->norintsts);
return TIMEOUT; return TIMEOUT;
} }
if (mask & TEGRA_MMC_NORINTSTS_CMD_TIMEOUT) { if (mask & TEGRA_MMC_NORINTSTS_CMD_TIMEOUT) {
/* Timeout Error */ /* Timeout Error */
debug("timeout: %08x cmd %d\n", mask, cmd->cmdidx); debug("timeout: %08x cmd %d\n", mask, cmd->cmdidx);
writel(mask, &host->reg->norintsts);
return TIMEOUT; return TIMEOUT;
} else if (mask & TEGRA_MMC_NORINTSTS_ERR_INTERRUPT) { } else if (mask & TEGRA_MMC_NORINTSTS_ERR_INTERRUPT) {
/* Error Interrupt */ /* Error Interrupt */
debug("error: %08x cmd %d\n", mask, cmd->cmdidx); debug("error: %08x cmd %d\n", mask, cmd->cmdidx);
writel(mask, &host->reg->norintsts);
return -1; return -1;
} }
@ -265,6 +268,7 @@ static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
if (i == retry) { if (i == retry) {
printf("%s: card is still busy\n", __func__); printf("%s: card is still busy\n", __func__);
writel(mask, &host->reg->norintsts);
return TIMEOUT; return TIMEOUT;
} }

2
include/mmc.h
View file

@ -112,6 +112,8 @@
#define MMC_STATUS_CURR_STATE (0xf << 9) #define MMC_STATUS_CURR_STATE (0xf << 9)
#define MMC_STATUS_ERROR (1 << 19) #define MMC_STATUS_ERROR (1 << 19)
#define MMC_STATE_PRG (7 << 9)
#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */