Djam/u-boot
1
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2025-05-08 10:39:08 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

driver/ddr: Restruct driver to allow standalone memory space

Browse source 
U-boot has been initializing DDR for the main memory. The presumption
is the memory stays as a big continuous block, either linear or
interleaved. This change is to support putting some DDR controllers
to separated space without counting into main memory. The standalone
memory controller could use different number of DIMM slots.

Signed-off-by: York Sun <yorksun@freescale.com>
This commit is contained in:
York Sun 2014-08-01 15:51:00 -07:00
parent e211c12e77
commit 1d71efbb03
8 changed files with 240 additions and 110 deletions
Download patch file Download diff file Expand all files Collapse all files

26
drivers/ddr/fsl/util.c
View file

@ -149,7 +149,7 @@ u32 fsl_ddr_get_intl3r(void)
return val;
}
void board_add_ram_info(int use_default)
void print_ddr_info(unsigned int start_ctrl)
{
struct ccsr_ddr __iomem *ddr =
(struct ccsr_ddr __iomem *)(CONFIG_SYS_FSL_DDR_ADDR);
@ -164,17 +164,25 @@ void board_add_ram_info(int use_default)
int cas_lat;
#if CONFIG_NUM_DDR_CONTROLLERS >= 2
if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) {
if ((!(sdram_cfg & SDRAM_CFG_MEM_EN)) ||
(start_ctrl == 1)) {
ddr = (void __iomem *)CONFIG_SYS_FSL_DDR2_ADDR;
sdram_cfg = ddr_in32(&ddr->sdram_cfg);
}
#endif
#if CONFIG_NUM_DDR_CONTROLLERS >= 3
if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) {
if ((!(sdram_cfg & SDRAM_CFG_MEM_EN)) ||
(start_ctrl == 2)) {
ddr = (void __iomem *)CONFIG_SYS_FSL_DDR3_ADDR;
sdram_cfg = ddr_in32(&ddr->sdram_cfg);
}
#endif
if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) {
puts(" (DDR not enabled)\n");
return;
}
puts(" (DDR");
switch ((sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) >>
SDRAM_CFG_SDRAM_TYPE_SHIFT) {
@ -241,7 +249,7 @@ void board_add_ram_info(int use_default)
#endif
#endif
#if (CONFIG_NUM_DDR_CONTROLLERS >= 2)
if (cs0_config & 0x20000000) {
if ((cs0_config & 0x20000000) && (start_ctrl == 0)) {
puts("\n");
puts(" DDR Controller Interleaving Mode: ");
@ -290,3 +298,13 @@ void board_add_ram_info(int use_default)
}
}
}
void __weak detail_board_ddr_info(void)
{
print_ddr_info(0);
}
void board_add_ram_info(int use_default)
{
detail_board_ddr_info();
}