arm: mvebu: turris_omnia: Fix ethernet PHY reset gpio FDT fixup

For board revisions where the WAN ethernet PHY reset GPIO is controllable
via MCU we currently insert a phy-reset-gpios property into the ethernet
controller node. The mvneta driver parses this property and uses the
GPIO to reset the PHY.

But this phy-reset-gpios property is not a valid DT binding in upstream
kernel. Instead, a reset-gpios property should be inserted into the
ethernet PHY node. This correct DT binding is supported by the DM ETH PHY
U-Boot driver.

Insert the reset-gpios property into the WAN PHY node instead the
phy-reset-gpios property in WAN ETH node so that Linux will correctly use
the reset GPIO.

Enable the CONFIG_DM_ETH_PHY config option so that U-Boot will also use
the correct DT property.

Note: currently there are 4 ethernet controller drivers parsing the
wrong DT property: dwc_eth_qos, fex_mxc, mvneta and mvpp2. We should
convert all relevant device-trees to use reset-gpios so that we can get
rid of these drivers parsing this property.

Fixes: 1da53ae26a ("arm: mvebu: turris_omnia: Add support for design with SW reset signals")
Signed-off-by: Marek Behún <kabel@kernel.org>
This commit is contained in:
Marek Behún 2024-06-18 17:34:30 +02:00 committed by Stefan Roese
parent 529d24002b
commit 1a05180762
2 changed files with 26 additions and 19 deletions

View file

@ -978,11 +978,21 @@ static int fixup_mcu_gpio_in_pcie_nodes(void *blob)
return 0;
}
static int fixup_mcu_gpio_in_eth_wan_node(void *blob)
static int get_phy_wan_node_offset(const void *blob)
{
u32 phy_wan_phandle;
phy_wan_phandle = fdt_getprop_u32_default(blob, "ethernet2", "phy-handle", 0);
if (!phy_wan_phandle)
return -FDT_ERR_NOTFOUND;
return fdt_node_offset_by_phandle(blob, phy_wan_phandle);
}
static int fixup_mcu_gpio_in_phy_wan_node(void *blob)
{
unsigned int mcu_phandle;
int eth_wan_node;
int ret;
int phy_wan_node, ret;
ret = fdt_increase_size(blob, 64);
if (ret < 0) {
@ -990,21 +1000,17 @@ static int fixup_mcu_gpio_in_eth_wan_node(void *blob)
return ret;
}
eth_wan_node = fdt_path_offset(blob, "ethernet2");
if (eth_wan_node < 0)
return eth_wan_node;
phy_wan_node = get_phy_wan_node_offset(blob);
if (phy_wan_node < 0)
return phy_wan_node;
mcu_phandle = fdt_create_phandle_by_compatible(blob, "cznic,turris-omnia-mcu");
if (!mcu_phandle)
return -FDT_ERR_NOPHANDLES;
/* insert: phy-reset-gpios = <&mcu 2 gpio GPIO_ACTIVE_LOW>; */
ret = insert_mcu_gpio_prop(blob, eth_wan_node, "phy-reset-gpios",
mcu_phandle, 2, ilog2(EXT_CTL_nRES_PHY), GPIO_ACTIVE_LOW);
if (ret < 0)
return ret;
return 0;
/* insert: reset-gpios = <&mcu 2 gpio GPIO_ACTIVE_LOW>; */
return insert_mcu_gpio_prop(blob, phy_wan_node, "reset-gpios",
mcu_phandle, 2, ilog2(EXT_CTL_nRES_PHY), GPIO_ACTIVE_LOW);
}
static void fixup_atsha_node(void *blob)
@ -1033,7 +1039,7 @@ int board_fix_fdt(void *blob)
{
if (omnia_mcu_has_feature(FEAT_PERIPH_MCU)) {
fixup_mcu_gpio_in_pcie_nodes(blob);
fixup_mcu_gpio_in_eth_wan_node(blob);
fixup_mcu_gpio_in_phy_wan_node(blob);
}
fixup_msata_port_nodes(blob);
@ -1218,14 +1224,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
int node;
/*
* U-Boot's FDT blob contains phy-reset-gpios in ethernet2
* node when MCU controls all peripherals resets.
* U-Boot's FDT blob contains reset-gpios in ethernet2 PHY node when MCU
* controls all peripherals resets.
* Fixup MCU GPIO nodes in PCIe and eth wan nodes in this case.
*/
node = fdt_path_offset(gd->fdt_blob, "ethernet2");
if (node >= 0 && fdt_getprop(gd->fdt_blob, node, "phy-reset-gpios", NULL)) {
node = get_phy_wan_node_offset(gd->fdt_blob);
if (node >= 0 && fdt_getprop(gd->fdt_blob, node, "reset-gpios", NULL)) {
fixup_mcu_gpio_in_pcie_nodes(blob);
fixup_mcu_gpio_in_eth_wan_node(blob);
fixup_mcu_gpio_in_phy_wan_node(blob);
}
fixup_spi_nor_partitions(blob);

View file

@ -101,6 +101,7 @@ CONFIG_PHY_ANEG_TIMEOUT=8000
CONFIG_PHY_MARVELL=y
CONFIG_PHY_FIXED=y
CONFIG_DM_DSA=y
CONFIG_DM_ETH_PHY=y
CONFIG_PHY_GIGE=y
CONFIG_MV88E6XXX=y
CONFIG_MVNETA=y