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driver/ddr/fsl: Update DDR4 RTT values

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DDR4 has different RTT value and code according to JEDEC spec. Update
the macros and options .

Signed-off-by: York Sun <yorksun@freescale.com>
This commit is contained in:
York Sun 2015-11-04 10:03:17 -08:00
parent 5076c64a08
commit 19601dd99c
2 changed files with 244 additions and 2 deletions
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9
include/fsl_ddr_sdram.h
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@ -33,6 +33,15 @@
#define DDR3_RTT_20_OHM 4 /* RTT_Nom = RZQ/12 */
#define DDR3_RTT_30_OHM 5 /* RTT_Nom = RZQ/8 */
#define DDR4_RTT_OFF 0
#define DDR4_RTT_60_OHM 1 /* RZQ/4 */
#define DDR4_RTT_120_OHM 2 /* RZQ/2 */
#define DDR4_RTT_40_OHM 3 /* RZQ/6 */
#define DDR4_RTT_240_OHM 4 /* RZQ/1 */
#define DDR4_RTT_48_OHM 5 /* RZQ/5 */
#define DDR4_RTT_80_OHM 6 /* RZQ/3 */
#define DDR4_RTT_34_OHM 7 /* RZQ/7 */
#define DDR2_RTT_OFF 0
#define DDR2_RTT_75_OHM 1
#define DDR2_RTT_150_OHM 2