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arm: ti: am3517_evm: Migrate to OF_UPSTREAM
With the feature of OF_UPSTREAM now available, the device trees for the SOM and baseboard can now deleted and the device tree locations need to point to the ti/omap directory. Signed-off-by: Adam Ford <aford173@gmail.com> V2: Remove DT reference from Makefile.
This commit is contained in:
Adam Ford
Tom Rini
parent
f7404d1395
commit
160ab4ba9f
6 changed files with 2 additions and 809 deletions
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@ -482,7 +482,6 @@ dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \
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am437x-idk-evm.dtb \
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am4372-generic.dtb \
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am437x-cm-t43.dtb
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dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb
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dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
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dtb-$(CONFIG_ARCH_SOCFPGA) += \
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@ -1,339 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include "am3517.dtsi"
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#include "am3517-som.dtsi"
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#include "am3517-evm-ui.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)";
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compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3";
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aliases {
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display0 = &lcd0;
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};
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chosen {
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stdout-path = &uart3;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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vmmc_fixed: vmmc {
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compatible = "regulator-fixed";
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regulator-name = "vmmc_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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gpio-keys {
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compatible = "gpio-keys-polled";
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poll-interval = <100>;
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button-user {
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label = "User Push Button";
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linux,code = <BTN_0>;
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gpios = <&tca6416 5 GPIO_ACTIVE_LOW>;
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};
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switch-1 {
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label = "User Switch 1";
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linux,code = <BTN_1>;
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gpios = <&tca6416 8 GPIO_ACTIVE_LOW>;
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};
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switch-2 {
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label = "User Switch 2";
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linux,code = <BTN_2>;
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gpios = <&tca6416 9 GPIO_ACTIVE_LOW>;
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};
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switch-3 {
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label = "User Switch 3";
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linux,code = <BTN_3>;
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gpios = <&tca6416 10 GPIO_ACTIVE_LOW>;
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};
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switch-4 {
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label = "User Switch 4";
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linux,code = <BTN_4>;
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gpios = <&tca6416 11 GPIO_ACTIVE_LOW>;
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};
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switch-5 {
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label = "User Switch 5";
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linux,code = <BTN_5>;
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gpios = <&tca6416 12 GPIO_ACTIVE_LOW>;
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};
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switch-6 {
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label = "User Switch 6";
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linux,code = <BTN_6>;
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gpios = <&tca6416 13 GPIO_ACTIVE_LOW>;
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};
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switch-7 {
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label = "User Switch 7";
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linux,code = <BTN_7>;
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gpios = <&tca6416 14 GPIO_ACTIVE_LOW>;
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};
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switch-8 {
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label = "User Switch 8";
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linux,code = <BTN_8>;
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gpios = <&tca6416 15 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins>;
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user_led_1 {
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label = "am3517evm:green:user_led_1";
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gpios = <&tca6416 7 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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user_led_2 {
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label = "am3517evm:green:user_led_2";
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gpios = <&tca6416 6 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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user_led_3 {
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label = "am3517evm:green:user_led_3";
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gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0"; /* SD/MMC card activity */
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};
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user_led_4 {
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label = "am3517evm:green:user_led_4";
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gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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lcd0: display@0 {
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/* This isn't the exact LCD, but the timings meet spec */
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/* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */
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compatible = "newhaven,nhd-4.3-480272ef-atxl";
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label = "15";
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backlight = <&bl>;
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enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; /* gpio176, lcd INI */
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vcc-supply = <&vdd_io_reg>;
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port {
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lcd_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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};
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bl: backlight {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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power-supply = <&vdd_io_reg>;
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pinctrl-0 = <&backlight_pins>;
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pwms = <&pwm11 0 5000000 0>;
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brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
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default-brightness-level = <7>;
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enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */
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};
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pwm11: pwm-11 {
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compatible = "ti,omap-dmtimer-pwm";
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pinctrl-names = "default";
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pinctrl-0 = <&pwm_pins>;
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ti,timers = <&timer11>;
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#pwm-cells = <3>;
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ti,clock-source = <0x01>;
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};
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/* HS USB Host PHY on PORT 1 */
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hsusb1_phy: hsusb1_phy {
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pinctrl-names = "default";
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pinctrl-0 = <&hsusb1_rst_pins>;
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */
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#phy-cells = <0>;
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};
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};
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&davinci_emac {
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pinctrl-names = "default";
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pinctrl-0 = <ðernet_pins>;
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status = "okay";
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};
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&davinci_mdio {
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status = "okay";
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};
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&dss {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&dss_dpi_pins>;
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vdds_dsi-supply = <&vdd_io_reg>;
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vdda_video-supply = <&vdd_io_reg>;
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port {
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dpi_out: endpoint {
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remote-endpoint = <&lcd_in>;
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data-lines = <16>;
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};
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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/* User DIP swithes [1:8] / User LEDS [1:2] */
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tca6416: gpio@21 {
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compatible = "ti,tca6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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vcc-supply = <&vdd_io_reg>;
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};
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};
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&i2c3 {
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clock-frequency = <400000>;
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};
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&mmc1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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vmmc-supply = <&vmmc_fixed>;
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bus-width = <4>;
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wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */
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cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio_127 */
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};
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&mmc3 {
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status = "disabled";
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};
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&usbhshost {
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pinctrl-names = "default";
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pinctrl-0 = <&hsusb1_pins>;
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port1-mode = "ehci-phy";
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};
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&usbhsehci {
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phys = <&hsusb1_phy>;
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};
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&omap3_pmx_core {
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ethernet_pins: pinmux_ethernet_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21fe, PIN_INPUT | MUX_MODE0) /* rmii_mdio_data */
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OMAP3_CORE1_IOPAD(0x2200, MUX_MODE0) /* rmii_mdio_clk */
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OMAP3_CORE1_IOPAD(0x2202, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd0 */
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OMAP3_CORE1_IOPAD(0x2204, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd1 */
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OMAP3_CORE1_IOPAD(0x2206, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_crs_dv */
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OMAP3_CORE1_IOPAD(0x2208, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_rxer */
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OMAP3_CORE1_IOPAD(0x220a, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd0 */
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OMAP3_CORE1_IOPAD(0x220c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd1 */
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OMAP3_CORE1_IOPAD(0x220e, PIN_OUTPUT_PULLDOWN |MUX_MODE0) /* rmii_txen */
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OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */
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>;
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};
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leds_pins: pinmux_leds_pins {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */
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OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
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OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
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OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
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OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
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OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
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OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
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OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat4.gpio_126 */
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OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat5.gpio_127 */
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>;
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};
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pwm_pins: pinmux_pwm_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE1) /* mcspi2_cs0.gpt11_pwm */
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>;
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};
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backlight_pins: pinmux_backlight_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT | MUX_MODE4) /* mcspi2_cs1.gpio_182 */
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>;
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};
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dss_dpi_pins: pinmux_dss_dpi_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21d2, PIN_OUTPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
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OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
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OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
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OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
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OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
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OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
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OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
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OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
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OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
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OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
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OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
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OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
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OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
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OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
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OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
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OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
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OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
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OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
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OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
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OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
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>;
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};
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hsusb1_rst_pins: pinmux_hsusb1_rst_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
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>;
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};
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};
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&omap3_pmx_core2 {
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hsusb1_pins: pinmux_hsusb1_pins {
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pinctrl-single,pins = <
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OMAP3430_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
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OMAP3430_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
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OMAP3430_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */
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OMAP3430_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */
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OMAP3430_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */
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OMAP3430_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */
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OMAP3430_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */
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OMAP3430_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */
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OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */
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OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */
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OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */
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OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */
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>;
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};
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};
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@ -1,234 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2016 Derald D. Woods <woods.technical@gmail.com>
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*
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* Based on am3517-evm.dts
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*/
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/ {
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd_core_reg>;
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};
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};
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wl12xx_buffer: wl12xx_buf {
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compatible = "regulator-fixed";
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regulator-name = "wl1271_buf";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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pinctrl-names = "default";
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pinctrl-0 = <&wl12xx_buffer_pins>;
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gpio = <&gpio5 1 GPIO_ACTIVE_LOW>; /* gpio 129 */
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regulator-always-on;
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vin-supply = <&vdd_1v8_reg>;
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};
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wl12xx_vmmc2: wl12xx_vmmc2 {
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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pinctrl-names = "default";
|
||||
pinctrl-0 = <&wl12xx_wkup_pins>;
|
||||
gpio = <&gpio1 3 GPIO_ACTIVE_HIGH >; /* gpio 3 */
|
||||
startup-delay-us = <70000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
vin-supply = <&wl12xx_buffer>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
|
||||
|
||||
nand@0,0 {
|
||||
compatible = "ti,omap2-nand";
|
||||
linux,mtd-name = "micron,mt29f4g16abchch";
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
nand-bus-width = <16>;
|
||||
ti,nand-ecc-opt = "bch8";
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <44>;
|
||||
gpmc,cs-wr-off-ns = <44>;
|
||||
gpmc,adv-on-ns = <6>;
|
||||
gpmc,adv-rd-off-ns = <34>;
|
||||
gpmc,adv-wr-off-ns = <44>;
|
||||
gpmc,we-off-ns = <40>;
|
||||
gpmc,oe-off-ns = <54>;
|
||||
gpmc,access-ns = <64>;
|
||||
gpmc,rd-cycle-ns = <82>;
|
||||
gpmc,wr-cycle-ns = <82>;
|
||||
gpmc,wr-access-ns = <40>;
|
||||
gpmc,wr-data-mux-bus-ns = <0>;
|
||||
gpmc,device-width = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
|
||||
s35390a: s35390a@30 {
|
||||
compatible = "sii,s35390a";
|
||||
reg = <0x30>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rtc_pins>;
|
||||
interrupts-extended = <&gpio2 23 IRQ_TYPE_EDGE_FALLING>; /* gpio_55 */
|
||||
};
|
||||
|
||||
tps: tps65023@48 {
|
||||
compatible = "ti,tps65023";
|
||||
reg = <0x48>;
|
||||
|
||||
regulators {
|
||||
vdd_core_reg: VDCDC1 {
|
||||
regulator-name = "vdd_core";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
vdd_io_reg: VDCDC2 {
|
||||
regulator-name = "vdd_io";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vdd_1v8_reg: VDCDC3 {
|
||||
regulator-name = "vdd_1v8";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vdd_usb18_reg: LDO1 {
|
||||
regulator-name = "vdd_usb18";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vdd_usb33_reg: LDO2 {
|
||||
regulator-name = "vdd_usb33";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
touchscreen: tsc2004@4b {
|
||||
compatible = "ti,tsc2004";
|
||||
reg = <0x4b>;
|
||||
|
||||
vio-supply = <&vdd_io_reg>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&tsc2004_pins>;
|
||||
interrupts-extended = <&gpio3 1 IRQ_TYPE_EDGE_RISING>; /* gpio_65 */
|
||||
|
||||
touchscreen-fuzz-x = <4>;
|
||||
touchscreen-fuzz-y = <7>;
|
||||
touchscreen-fuzz-pressure = <2>;
|
||||
touchscreen-size-x = <480>;
|
||||
touchscreen-size-y = <272>;
|
||||
touchscreen-max-pressure = <2048>;
|
||||
|
||||
ti,x-plate-ohms = <280>;
|
||||
ti,esd-recovery-timeout-ms = <8000>;
|
||||
};
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
interrupts-extended = <&intc 86 /* &omap3_pmx_core 0x12c */>;
|
||||
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc2_pins>;
|
||||
vmmc-supply = <&wl12xx_vmmc2>;
|
||||
non-removable;
|
||||
bus-width = <4>;
|
||||
cap-power-off-card;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1271";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <10 IRQ_TYPE_EDGE_RISING>; /* gpio_170 */
|
||||
ref-clock-frequency = <26000000>;
|
||||
tcxo-clock-frequency = <26000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
|
||||
bluetooth {
|
||||
compatible = "ti,wl1271-st";
|
||||
enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio 56 */
|
||||
max-speed = <3000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
|
||||
wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4) /* mmc1_dat7.gpio_129 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc2_pins: pinmux_mmc2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_clk.mmc2_clk */
|
||||
OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_cmd.mmc2_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat0.mmc2_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat1.mmc2_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat2.mmc2_dat2 */
|
||||
OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc2_dat3.mmc2_dat3 */
|
||||
OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat4.mmc2_dir_dat0 */
|
||||
OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat5.mmc2_dir_dat1 */
|
||||
OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat6.mmc2_dir_cmd */
|
||||
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* mmc2_dat7.mmc2_clkin */
|
||||
OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE4) /* hdq_sio.gpio_170 */
|
||||
>;
|
||||
};
|
||||
|
||||
rtc_pins: pinmux_rtc_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */
|
||||
>;
|
||||
};
|
||||
|
||||
tsc2004_pins: pinmux_tsc2004_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts */
|
||||
OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart2_rts */
|
||||
OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
|
||||
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx */
|
||||
OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT | MUX_MODE0) /* gpio_56 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_wkup {
|
||||
|
||||
wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
|
||||
pinctrl-single,pins = <
|
||||
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,109 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Device Tree Source for am3517 SoC
|
||||
*
|
||||
* Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
|
||||
*/
|
||||
|
||||
#include "omap3.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
serial3 = &uart4;
|
||||
can = &hecc;
|
||||
};
|
||||
|
||||
ocp@68000000 {
|
||||
am35x_otg_hs: am35x_otg_hs@5c040000 {
|
||||
compatible = "ti,omap3-musb";
|
||||
ti,hwmods = "am35x_otg_hs";
|
||||
status = "disabled";
|
||||
reg = <0x5c040000 0x1000>;
|
||||
interrupts = <71>;
|
||||
interrupt-names = "mc";
|
||||
};
|
||||
|
||||
davinci_emac: ethernet@5c000000 {
|
||||
compatible = "ti,am3517-emac";
|
||||
ti,hwmods = "davinci_emac";
|
||||
status = "disabled";
|
||||
reg = <0x5c000000 0x30000>;
|
||||
interrupts = <67 68 69 70>;
|
||||
syscon = <&scm_conf>;
|
||||
ti,davinci-ctrl-reg-offset = <0x10000>;
|
||||
ti,davinci-ctrl-mod-reg-offset = <0>;
|
||||
ti,davinci-ctrl-ram-offset = <0x20000>;
|
||||
ti,davinci-ctrl-ram-size = <0x2000>;
|
||||
ti,davinci-rmii-en = /bits/ 8 <1>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
clocks = <&emac_ick>;
|
||||
clock-names = "ick";
|
||||
};
|
||||
|
||||
davinci_mdio: mdio@5c030000 {
|
||||
compatible = "ti,davinci_mdio";
|
||||
ti,hwmods = "davinci_mdio";
|
||||
status = "disabled";
|
||||
reg = <0x5c030000 0x1000>;
|
||||
bus_freq = <1000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
clocks = <&emac_fck>;
|
||||
clock-names = "fck";
|
||||
};
|
||||
|
||||
uart4: serial@4809e000 {
|
||||
compatible = "ti,omap3-uart";
|
||||
ti,hwmods = "uart4";
|
||||
status = "disabled";
|
||||
reg = <0x4809e000 0x400>;
|
||||
interrupts = <84>;
|
||||
dmas = <&sdma 55 &sdma 54>;
|
||||
dma-names = "tx", "rx";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
omap3_pmx_core2: pinmux@480025d8 {
|
||||
compatible = "ti,omap3-padconf", "pinctrl-single";
|
||||
reg = <0x480025d8 0x24>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#pinctrl-cells = <1>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
pinctrl-single,register-width = <16>;
|
||||
pinctrl-single,function-mask = <0xff1f>;
|
||||
};
|
||||
|
||||
hecc: can@5c050000 {
|
||||
compatible = "ti,am3517-hecc";
|
||||
status = "disabled";
|
||||
reg = <0x5c050000 0x80>,
|
||||
<0x5c053000 0x180>,
|
||||
<0x5c052000 0x200>;
|
||||
reg-names = "hecc", "hecc-ram", "mbx";
|
||||
interrupts = <24>;
|
||||
clocks = <&hecc_ck>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Table Table 5-79 of the TRM shows 480ab000 is reserved */
|
||||
&usb_otg_hs {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&iva {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mailbox {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&mmu_isp {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/include/ "am35xx-clocks.dtsi"
|
||||
/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
|
||||
|
|
@ -1,125 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Device Tree Source for OMAP3 clock data
|
||||
*
|
||||
* Copyright (C) 2013 Texas Instruments, Inc.
|
||||
*/
|
||||
&scm_clocks {
|
||||
emac_ick: emac_ick@32c {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,am35xx-gate-clock";
|
||||
clocks = <&ipss_ick>;
|
||||
reg = <0x032c>;
|
||||
ti,bit-shift = <1>;
|
||||
};
|
||||
|
||||
emac_fck: emac_fck@32c {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&rmii_ck>;
|
||||
reg = <0x032c>;
|
||||
ti,bit-shift = <9>;
|
||||
};
|
||||
|
||||
vpfe_ick: vpfe_ick@32c {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,am35xx-gate-clock";
|
||||
clocks = <&ipss_ick>;
|
||||
reg = <0x032c>;
|
||||
ti,bit-shift = <2>;
|
||||
};
|
||||
|
||||
vpfe_fck: vpfe_fck@32c {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&pclk_ck>;
|
||||
reg = <0x032c>;
|
||||
ti,bit-shift = <10>;
|
||||
};
|
||||
|
||||
hsotgusb_ick_am35xx: hsotgusb_ick_am35xx@32c {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,am35xx-gate-clock";
|
||||
clocks = <&ipss_ick>;
|
||||
reg = <0x032c>;
|
||||
ti,bit-shift = <0>;
|
||||
};
|
||||
|
||||
hsotgusb_fck_am35xx: hsotgusb_fck_am35xx@32c {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&sys_ck>;
|
||||
reg = <0x032c>;
|
||||
ti,bit-shift = <8>;
|
||||
};
|
||||
|
||||
hecc_ck: hecc_ck@32c {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,am35xx-gate-clock";
|
||||
clocks = <&sys_ck>;
|
||||
reg = <0x032c>;
|
||||
ti,bit-shift = <3>;
|
||||
};
|
||||
};
|
||||
&cm_clocks {
|
||||
ipss_ick: ipss_ick@a10 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,am35xx-interface-clock";
|
||||
clocks = <&core_l3_ick>;
|
||||
reg = <0x0a10>;
|
||||
ti,bit-shift = <4>;
|
||||
};
|
||||
|
||||
rmii_ck: rmii_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <50000000>;
|
||||
};
|
||||
|
||||
pclk_ck: pclk_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <27000000>;
|
||||
};
|
||||
|
||||
uart4_ick_am35xx: uart4_ick_am35xx@a10 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap3-interface-clock";
|
||||
clocks = <&core_l4_ick>;
|
||||
reg = <0x0a10>;
|
||||
ti,bit-shift = <23>;
|
||||
};
|
||||
|
||||
uart4_fck_am35xx: uart4_fck_am35xx@a00 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,wait-gate-clock";
|
||||
clocks = <&core_48m_fck>;
|
||||
reg = <0x0a00>;
|
||||
ti,bit-shift = <23>;
|
||||
};
|
||||
};
|
||||
|
||||
&cm_clockdomains {
|
||||
core_l3_clkdm: core_l3_clkdm {
|
||||
compatible = "ti,clockdomain";
|
||||
clocks = <&sdrc_ick>, <&ipss_ick>, <&emac_ick>, <&vpfe_ick>,
|
||||
<&hsotgusb_ick_am35xx>, <&hsotgusb_fck_am35xx>,
|
||||
<&hecc_ck>;
|
||||
};
|
||||
|
||||
core_l4_clkdm: core_l4_clkdm {
|
||||
compatible = "ti,clockdomain";
|
||||
clocks = <&cpefuse_fck>, <&ts_fck>, <&usbtll_fck>,
|
||||
<&usbtll_ick>, <&mmchs3_ick>, <&mmchs3_fck>,
|
||||
<&mmchs2_fck>, <&mmchs1_fck>, <&i2c3_fck>, <&i2c2_fck>,
|
||||
<&i2c1_fck>, <&mcspi4_fck>, <&mcspi3_fck>,
|
||||
<&mcspi2_fck>, <&mcspi1_fck>, <&uart2_fck>,
|
||||
<&uart1_fck>, <&hdq_fck>, <&mmchs2_ick>, <&mmchs1_ick>,
|
||||
<&hdq_ick>, <&mcspi4_ick>, <&mcspi3_ick>,
|
||||
<&mcspi2_ick>, <&mcspi1_ick>, <&i2c3_ick>, <&i2c2_ick>,
|
||||
<&i2c1_ick>, <&uart2_ick>, <&uart1_ick>, <&gpt11_ick>,
|
||||
<&gpt10_ick>, <&mcbsp5_ick>, <&mcbsp1_ick>,
|
||||
<&omapctrl_ick>, <&aes2_ick>, <&sha12_ick>,
|
||||
<&uart4_ick_am35xx>, <&uart4_fck_am35xx>;
|
||||
};
|
||||
};
|
||||
|
|
@ -8,7 +8,7 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
|
|||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00
|
||||
CONFIG_DEFAULT_DEVICE_TREE="am3517-evm"
|
||||
CONFIG_DEFAULT_DEVICE_TREE="ti/omap/am3517-evm"
|
||||
CONFIG_SPL_TEXT_BASE=0x40200000
|
||||
CONFIG_TARGET_AM3517_EVM=y
|
||||
CONFIG_EMIF4=y
|
||||
|
|
@ -58,6 +58,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1920k(u-boot),256k(u-bo
|
|||
CONFIG_CMD_UBI=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_UPSTREAM=y
|
||||
CONFIG_ENV_OVERWRITE=y
|
||||
# CONFIG_ENV_IS_IN_FAT is not set
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue