Добавлены/обновлены оверлеи.

Файлы дерева устройств приведены к единому виду с загрузчиком U-Boot.
This commit is contained in:
tolst0v 2025-03-17 16:30:11 +04:00
parent 9e56b6d9e1
commit f97e09ec06
14 changed files with 449 additions and 211 deletions

View file

@ -40,7 +40,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-i2c1.dtbo \
sun50i-h6-i2c2.dtbo \
sun50i-h6-pwm.dtbo \
sun50i-h6-ruart.dtbo \
sun50i-h6-spi-add-cs1.dtbo \
sun50i-h6-spi-jedec-nor.dtbo \
sun50i-h6-spi-spidev.dtbo \
@ -48,7 +47,6 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-uart1.dtbo \
sun50i-h6-uart2.dtbo \
sun50i-h6-uart3.dtbo \
sun50i-h6-w1-gpio.dtbo \
sun50i-h616-i2c2-ph.dtbo \
sun50i-h616-i2c3-ph.dtbo \
sun50i-h616-i2c4-ph.dtbo \
@ -67,6 +65,17 @@ dtb-$(CONFIG_ARCH_SUNXI) += \
sun50i-h616-i2c0-pi.dtbo \
sun50i-h616-i2c1-pi.dtbo \
sun50i-h616-i2c2-pi.dtbo \
sun50i-h6-i2c1.dtbo \
sun50i-h6-i2c2.dtbo \
sun50i-h6-i2c3.dtbo \
sun50i-h6-i2s.dtbo \
sun50i-h6-i2s_pcm5102.dtbo \
sun50i-h6-i2s_pcm5122.dtbo \
sun50i-h6-i2s_wm8960.dtbo \
sun50i-h6-s_uart.dtbo \
sun50i-h6-spi0.dtbo \
sun50i-h6-uart3.dtbo \
sun50i-h6-w1_gpio.dtbo \
sun50i-h616-gpu.dtbo
scr-$(CONFIG_ARCH_SUNXI) += \

View file

@ -2,19 +2,17 @@
/plugin/;
/ {
compatible = "allwinner,sun50i-h6";
fragment@0 {
target-path = "/aliases";
target = <&i2c1>;
__overlay__ {
i2c1 = "/soc/i2c@5002400";
status = "disabled"; /* PH5,PH6 -OK только когда не используется SPI1 */
};
};
fragment@1 {
target = <&i2c1>;
target = <&i2c0>;
__overlay__ {
status = "okay";
status = "okay"; /* PD25, PD26 */
};
};
};
};

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@ -2,19 +2,26 @@
/plugin/;
/ {
compatible = "allwinner,sun50i-h6";
fragment@0 {
target-path = "/aliases";
target = <&i2c1>;
__overlay__ {
i2c2 = "/soc/i2c@5002800";
status = "disabled"; /* PH5,PH6 -OK только когда не используется SPI1 */
};
};
fragment@1 {
target = <&i2c2>;
target = <&uart3>;
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>; /* PD23, PD24 */
status = "disabled";
};
};
};
fragment@2 {
target = <&i2c2>;
__overlay__ {
status = "okay"; /* PD23, PD24 */
};
};
};

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@ -0,0 +1,18 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&spi1>;
__overlay__ {
status = "disabled";
};
};
fragment@1 {
target = <&i2c1>;
__overlay__ {
status = "okay";
};
};
};

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@ -0,0 +1,42 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2s2>;
__overlay__ {
status = "okay";
pinctrl-0 = <&i2s2_pins>;
sound-dai = <&pcm5102a>;
pinctrl-names = "default";
};
};
fragment@1 {
target-path = "/";
__overlay__ {
sound_i2s: sound_i2s {
compatible = "simple-audio-card";
simple-audio-card,name = "I2S-master";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,format = "i2s";
status = "okay";
simple-audio-card,cpu {
sound-dai = <&i2s2>;
};
simple-audio-card,codec {
sound-dai = <&pcm5102a>;
};
};
pcm5102a: pcm5102a {
#sound-dai-cells = <0>;
compatible = "ti,pcm5102a";
pcm510x,format = "i2s";
};
};
};
};

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@ -0,0 +1,42 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2s2>;
__overlay__ {
status = "okay";
pinctrl-0 = <&i2s2_pins>;
sound-dai = <&pcm5102a>;
pinctrl-names = "default";
};
};
fragment@1 {
target-path = "/";
__overlay__ {
sound_i2s: sound_i2s {
compatible = "simple-audio-card";
simple-audio-card,name = "I2S-master";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,format = "i2s";
status = "okay";
simple-audio-card,cpu {
sound-dai = <&i2s2>;
};
simple-audio-card,codec {
sound-dai = <&pcm5102a>;
};
};
pcm5102a: pcm5102a {
#sound-dai-cells = <0>;
compatible = "ti,pcm5102a";
pcm510x,format = "i2s";
};
};
};
};

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@ -0,0 +1,60 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2s2>;
__overlay__ {
status = "okay";
pinctrl-0 = <&i2s2_pins>;
sound-dai = <&pcm5122>;
pinctrl-names = "default";
};
};
fragment@1 {
target-path = "/";
__overlay__ {
pcm5122_i2s: pcm5122_i2s {
compatible = "simple-audio-card";
simple-audio-card,name = "PCM5122";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&cpu_dai>;
simple-audio-card,frame-master = <&cpu_dai>;
status="okay";
cpu_dai: simple-audio-card,cpu {
sound-dai = <&i2s2>;
/* test tdm: use fixed 64fs instead of 32/48/64 */
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
};
codec_dai: simple-audio-card,codec {
sound-dai = <&pcm5122>;
};
};
};
};
fragment@2 {
target = <&i2c0>;
__overlay__ {
status = "okay"; /* PD25, PD26 */
#address-cells = <1>;
#size-cells = <0>;
pcm5122: pcm5122@4d {
compatible = "ti,pcm5122";
reg = <0x4d>;
#sound-dai-cells = <0>;
/* AVDD-supply = <&vdd_3v3_reg>; */
/* DVDD-supply = <&vdd_3v3_reg>; */
/* CPVDD-supply = <&vdd_3v3_reg>; */
status = "okay";
};
};
};
};

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@ -0,0 +1,76 @@
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2s2>;
__overlay__ {
status = "okay";
pinctrl-0 = <&i2s2_pins>;
sound-dai = <&wm8960>;
pinctrl-names = "default";
};
};
fragment@1 {
target-path = "/";
__overlay__ {
wm8960_mclk: wm8960_mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12288000>;
};
sound_i2s {
compatible = "simple-audio-card";
simple-audio-card,name = "wm8960-soundcard";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,format = "i2s";
status = "okay";
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Line", "Line In",
"Line", "Line Out",
"Speaker", "Speaker",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Headphone Jack", "HP_L",
"Headphone Jack", "HP_R",
"Speaker", "SPK_LP",
"Speaker", "SPK_LN",
"LINPUT1", "Mic Jack",
"LINPUT3", "Mic Jack",
"RINPUT1", "Mic Jack",
"RINPUT2", "Mic Jack";
simple-audio-card,cpu {
sound-dai = <&i2s2>;
};
dailink0_slave: simple-audio-card,codec {
sound-dai = <&wm8960>;
clocks = <&wm8960_mclk>;
clock-names = "mclk";
};
};
};
};
fragment@2 {
target = <&i2c0>;
__overlay__ {
status = "okay"; /* PD25, PD26 */
#address-cells = <1>;
#size-cells = <0>;
wm8960: wm8960 {
compatible = "wlf,wm8960";
reg = <0x1a>;
#sound-dai-cells = <0>;
/* AVDD-supply = <&vdd_5v0_reg>; */
/* DVDD-supply = <&vdd_3v3_reg>; */
status = "okay";
};
};
};
};

View file

@ -2,12 +2,10 @@
/plugin/;
/ {
compatible = "allwinner,sun50i-h6";
fragment@0 {
target = <&r_uart>;
__overlay__ {
__overlay__ {
status = "okay";
};
};
};
};

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@ -0,0 +1,47 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
/plugin/;
/ {
fragment@0 {
target = <&i2c1>;
__overlay__ {
status = "disabled";
};
};
fragment@1 {
target = <&pio>;
__overlay__ {
spi1_cs1: spi1_cs1 {
pins = "PH2";
function = "gpio_out";
output-high;
};
};
};
fragment@2 {
target = <&spi1>;
__overlay__ {
pinctrl-names = "default", "default";
pinctrl-1 = <&spi1_cs1>;
cs-gpios = <0>, <&pio 7 2 0>; /* PH2 */
status = "okay";
spidev@0 {
compatible = "rohm,dh2228fv";
status = "okay";
reg = <0>;
spi-max-frequency = <1000000>;
};
spidev@1 {
compatible = "rohm,dh2228fv";
status = "okay";
reg = <1>;
spi-max-frequency = <1000000>;
};
};
};
};

View file

@ -2,28 +2,16 @@
/plugin/;
/ {
compatible = "allwinner,sun50i-h6";
fragment@0 {
target-path = "/aliases";
target = <&i2c2>;
__overlay__ {
serial3 = "/soc/serial@5000c00";
status = "disabled"; /* PD23, PD24 */
};
};
fragment@1 {
target = <&pio>;
__overlay__ {
uart3_rts_cts: uart3-rts-cts-pins {
pins = "PD25", "PD26";
function = "uart3";
};
};
};
fragment@2 {
target = <&uart3>;
__overlay__ {
__overlay__ {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";

View file

@ -8,7 +8,7 @@
target = <&pio>;
__overlay__ {
w1_pins: w1_pins {
pins = "PC9";
pins = "PL10";
function = "gpio_in";
};
};
@ -21,7 +21,7 @@
compatible = "w1-gpio";
pinctrl-names = "default";
pinctrl-0 = <&w1_pins>;
gpios = <&pio 2 9 0>; /* PC9 */
gpios = <&r_pio 0 10 0>; /* PL10 */
status = "okay";
};
};

View file

@ -14,7 +14,7 @@
/ {
model = "Repka-Pi4-Optimal";
repka-freq = "1.968 GHz";
repka-pinout = "repka-pi4-pinout-1";
repka-pinout = "repka-pi4-base";
compatible = "rbs,repka-pi4", "allwinner,sun50i-h6";
aliases {
@ -22,7 +22,6 @@
serial0 = &uart0;
serial1 = &uart1;
serial2 = &r_uart;
serial3 = &uart3;
spi0 = &spi1;
i2c1 = &i2c0;
@ -111,6 +110,10 @@
status = "okay";
};
&analog {
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
@ -199,16 +202,20 @@
status = "okay";
};
&pcie {
vcc-supply = <&reg_bldo2>;
vdd-supply = <&reg_dcdcd>;
slot-supply = <&reg_vcc33_wifi>;
perst-gpio = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
/* clkreq-gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; */
/* wake-gpio = <&r_pio 0 4 0>; */
status = "okay";
};
&pio {
vcc-pc-supply = <&reg_bldo2>;
vcc-pd-supply = <&reg_cldo1>;
vcc-pg-supply = <&reg_vcc_wifi_io>;
spi1_cs1: spi1_cs1 {
pins = "PH2";
function = "gpio_out";
output-high;
};
};
&r_i2c {
@ -240,10 +247,12 @@
};
reg_aldo2: aldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc33-audio-tv-ephy-mac";
};
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc33-audio-tv-ephy-mac";
regulator-enable-ramp-delay = <100000>;
};
reg_aldo3: aldo3 {
regulator-always-on;
@ -317,8 +326,8 @@
reg_dcdcd: dcdcd {
regulator-always-on;
regulator-min-microvolt = <960000>;
regulator-max-microvolt = <960000>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-name = "vdd-sys";
};
@ -333,13 +342,14 @@
clocks = <&ext_osc32k>;
};
/delete-node/ &spi0;
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
status = "okay";
};
/* There's the BT part of the AP6256 connected to that UART */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
@ -371,7 +381,7 @@
};
&i2c3 {
status = "okay"; /* нужно для ac200 */
status = "okay"; /* нужно для ac200 */
};
&ac200_ephy_ctl {
@ -391,7 +401,7 @@
&mdio {
ext_rmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-id0044.1400",
"ethernet-phy-ieee802.3-c22";
"ethernet-phy-ieee802.3-c22";
reg = <1>;
resets = <&ac200_ephy_ctl>;
reset-names = "phy";
@ -402,60 +412,3 @@
&pwm {
status = "okay";
};
&i2c2 {
status = "okay"; /* PD23, PD24 - альт uart3 tx, rx pins */
};
&i2c1 {
status = "disabled"; /* PH5,PH6 -OK только когда не используется SPI1 */
};
&i2c0 {
status = "okay"; /* PD25, PD26 - альт uart3 rts, cts pins */
};
&spi1 {
pinctrl-names = "default", "default";
pinctrl-1 = <&spi1_cs1>;
cs-gpios = <0>, <&pio 7 2 0>; /* PH2 */
status = "okay";
spidev@0 {
compatible = "rohm,dh2228fv";
status = "okay";
reg = <0>;
spi-max-frequency = <1000000>;
};
spidev@1 {
compatible = "rohm,dh2228fv";
status = "okay";
reg = <1>;
spi-max-frequency = <1000000>;
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pin>;
status = "okay";
};
&r_pwm {
pinctrl-names = "default";
pinctrl-0 = <&r_pwm_pin>;
status = "okay";
};
&r_uart {
pinctrl-names = "default";
pinctrl-0 = <&r_uart_pins>; /* PL2, PL3 */
status = "okay"; /* почемуто когда включен пропадает вывод UART0 */
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>; /* PD23, PD24 */
status = "disabled";
};

View file

@ -120,9 +120,9 @@
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
@ -140,7 +140,7 @@
sound_hdmi: sound_hdmi {
compatible = "allwinner,sun9i-a80-hdmi-audio",
"allwinner,sun50i-h6-hdmi-audio";
"allwinner,sun50i-h6-hdmi-audio";
status = "disabled";
codec {
@ -156,13 +156,13 @@
compatible = "arm,armv8-timer";
arm,no-tick-in-suspend;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
soc {
@ -173,7 +173,7 @@
bus@1000000 {
compatible = "allwinner,sun50i-h6-de3",
"allwinner,sun50i-a64-de2";
"allwinner,sun50i-a64-de2";
reg = <0x1000000 0x400000>;
allwinner,sram = <&de2_sram 1>;
#address-cells = <1>;
@ -184,9 +184,9 @@
compatible = "allwinner,sun50i-h6-de3-clk";
reg = <0x0 0x10000>;
clocks = <&ccu CLK_BUS_DE>,
<&ccu CLK_DE>;
<&ccu CLK_DE>;
clock-names = "bus",
"mod";
"mod";
resets = <&ccu RST_BUS_DE>;
#clock-cells = <1>;
#reset-cells = <1>;
@ -196,9 +196,9 @@
compatible = "allwinner,sun50i-h6-de3-mixer-0";
reg = <0x100000 0x100000>;
clocks = <&display_clocks CLK_BUS_MIXER0>,
<&display_clocks CLK_MIXER0>;
<&display_clocks CLK_MIXER0>;
clock-names = "bus",
"mod";
"mod";
resets = <&display_clocks RST_MIXER0>;
iommus = <&iommu 0>;
@ -231,8 +231,8 @@
compatible = "allwinner,sun50i-h6-deinterlace";
reg = <0x01420000 0x2000>;
clocks = <&ccu CLK_BUS_DEINTERLACE>,
<&ccu CLK_DEINTERLACE>,
<&ccu CLK_MBUS_DEINTERLACE>;
<&ccu CLK_DEINTERLACE>,
<&ccu CLK_MBUS_DEINTERLACE>;
clock-names = "bus", "mod", "ram";
resets = <&ccu RST_BUS_DEINTERLACE>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
@ -243,7 +243,7 @@
compatible = "allwinner,sun50i-h6-video-engine";
reg = <0x01c0e000 0x2000>;
clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
<&ccu CLK_MBUS_VE>;
<&ccu CLK_MBUS_VE>;
clock-names = "ahb", "mod", "ram";
resets = <&ccu RST_BUS_VE>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
@ -253,11 +253,11 @@
gpu: gpu@1800000 {
compatible = "allwinner,sun50i-h6-mali",
"arm,mali-t720";
"arm,mali-t720";
reg = <0x01800000 0x4000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
clock-names = "core", "bus";
@ -277,7 +277,7 @@
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h6-system-control",
"allwinner,sun50i-a64-system-control";
"allwinner,sun50i-a64-system-control";
reg = <0x03000000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
@ -305,7 +305,7 @@
de2_sram: sram-section@0 {
compatible = "allwinner,sun50i-h6-sram-c",
"allwinner,sun50i-a64-sram-c";
"allwinner,sun50i-a64-sram-c";
reg = <0x0000 0x1e000>;
};
};
@ -319,7 +319,7 @@
ve_sram: sram-section@0 {
compatible = "allwinner,sun50i-h6-sram-c1",
"allwinner,sun4i-a10-sram-c1";
"allwinner,sun4i-a10-sram-c1";
reg = <0x000000 0x200000>;
};
};
@ -349,7 +349,7 @@
msgbox: mailbox@3003000 {
compatible = "allwinner,sun50i-h6-msgbox",
"allwinner,sun6i-a31-msgbox";
"allwinner,sun6i-a31-msgbox";
reg = <0x03003000 0x1000>;
clocks = <&ccu CLK_BUS_MSGBOX>;
resets = <&ccu RST_BUS_MSGBOX>;
@ -360,9 +360,9 @@
gic: interrupt-controller@3021000 {
compatible = "arm,gic-400";
reg = <0x03021000 0x1000>,
<0x03022000 0x2000>,
<0x03024000 0x2000>,
<0x03026000 0x2000>;
<0x03022000 0x2000>,
<0x03024000 0x2000>,
<0x03026000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
interrupt-controller;
#interrupt-cells = <3>;
@ -393,16 +393,16 @@
timer@3009000 {
compatible = "allwinner,sun50i-h6-timer",
"allwinner,sun8i-a23-timer";
"allwinner,sun8i-a23-timer";
reg = <0x03009000 0xa0>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
watchdog: watchdog@30090a0 {
compatible = "allwinner,sun50i-h6-wdt",
"allwinner,sun6i-a31-wdt";
"allwinner,sun6i-a31-wdt";
reg = <0x030090a0 0x20>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
@ -425,9 +425,9 @@
reg = <0x0300b000 0x400>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
@ -438,15 +438,15 @@
/omit-if-no-ref/
ext_rgmii_pins: rgmii-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
"PD11", "PD12", "PD13", "PD19", "PD20";
"PD5", "PD7", "PD8", "PD9", "PD10",
"PD11", "PD12", "PD13", "PD19", "PD20";
function = "emac";
drive-strength = <40>;
};
ext_rmii_pins: rmii_pins {
pins = "PA0", "PA1", "PA2", "PA3", "PA4",
"PA5", "PA6", "PA7", "PA8", "PA9";
"PA5", "PA6", "PA7", "PA8", "PA9";
function = "emac";
drive-strength = <40>;
};
@ -484,7 +484,7 @@
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
"PF4", "PF5";
function = "mmc0";
drive-strength = <30>;
bias-pull-up;
@ -493,7 +493,7 @@
/omit-if-no-ref/
mmc1_pins: mmc1-pins {
pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";
"PG4", "PG5";
function = "mmc1";
drive-strength = <30>;
bias-pull-up;
@ -502,8 +502,8 @@
/omit-if-no-ref/
mmc2_pins: mmc2-pins {
pins = "PC1", "PC4", "PC5", "PC6",
"PC7", "PC8", "PC9", "PC10",
"PC11", "PC12", "PC13", "PC14";
"PC7", "PC8", "PC9", "PC10",
"PC11", "PC12", "PC13", "PC14";
function = "mmc2";
drive-strength = <30>;
bias-pull-up;
@ -602,7 +602,7 @@
mmc0: mmc@4020000 {
compatible = "allwinner,sun50i-h6-mmc",
"allwinner,sun50i-a64-mmc";
"allwinner,sun50i-a64-mmc";
reg = <0x04020000 0x1000>;
clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
clock-names = "ahb", "mmc";
@ -619,7 +619,7 @@
mmc1: mmc@4021000 {
compatible = "allwinner,sun50i-h6-mmc",
"allwinner,sun50i-a64-mmc";
"allwinner,sun50i-a64-mmc";
reg = <0x04021000 0x1000>;
clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
clock-names = "ahb", "mmc";
@ -696,7 +696,7 @@
i2c0: i2c@5002000 {
compatible = "allwinner,sun50i-h6-i2c",
"allwinner,sun6i-a31-i2c";
"allwinner,sun6i-a31-i2c";
reg = <0x05002000 0x400>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C0>;
@ -710,7 +710,7 @@
i2c1: i2c@5002400 {
compatible = "allwinner,sun50i-h6-i2c",
"allwinner,sun6i-a31-i2c";
"allwinner,sun6i-a31-i2c";
reg = <0x05002400 0x400>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C1>;
@ -724,7 +724,7 @@
i2c2: i2c@5002800 {
compatible = "allwinner,sun50i-h6-i2c",
"allwinner,sun6i-a31-i2c";
"allwinner,sun6i-a31-i2c";
reg = <0x05002800 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C2>;
@ -738,7 +738,7 @@
i2c3: i2c@5002c00 {
compatible = "allwinner,sun50i-h6-i2c",
"allwinner,sun6i-a31-i2c";
"allwinner,sun6i-a31-i2c";
reg = <0x05002c00 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C3>;
@ -781,7 +781,7 @@
spi0: spi@5010000 {
compatible = "allwinner,sun50i-h6-spi",
"allwinner,sun8i-h3-spi";
"allwinner,sun8i-h3-spi";
reg = <0x05010000 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
@ -798,7 +798,7 @@
spi1: spi@5011000 {
compatible = "allwinner,sun50i-h6-spi",
"allwinner,sun8i-h3-spi";
"allwinner,sun8i-h3-spi";
reg = <0x05011000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
@ -815,7 +815,7 @@
emac: ethernet@5020000 {
compatible = "allwinner,sun50i-h6-emac",
"allwinner,sun50i-a64-emac";
"allwinner,sun50i-a64-emac";
syscon = <&syscon>;
reg = <0x05020000 0x10000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
@ -889,7 +889,7 @@
usb2otg: usb@5100000 {
compatible = "allwinner,sun50i-h6-musb",
"allwinner,sun8i-a33-musb";
"allwinner,sun8i-a33-musb";
reg = <0x05100000 0x0400>;
clocks = <&ccu CLK_BUS_OTG>;
resets = <&ccu RST_BUS_OTG>;
@ -904,19 +904,19 @@
usb2phy: phy@5100400 {
compatible = "allwinner,sun50i-h6-usb-phy";
reg = <0x05100400 0x24>,
<0x05101800 0x4>,
<0x05311800 0x4>;
<0x05101800 0x4>,
<0x05311800 0x4>;
reg-names = "phy_ctrl",
"pmu0",
"pmu3";
"pmu0",
"pmu3";
clocks = <&ccu CLK_USB_PHY0>,
<&ccu CLK_USB_PHY3>;
<&ccu CLK_USB_PHY3>;
clock-names = "usb0_phy",
"usb3_phy";
"usb3_phy";
resets = <&ccu RST_USB_PHY0>,
<&ccu RST_USB_PHY3>;
<&ccu RST_USB_PHY3>;
reset-names = "usb0_reset",
"usb3_reset";
"usb3_reset";
status = "disabled";
#phy-cells = <1>;
};
@ -926,10 +926,10 @@
reg = <0x05101000 0x100>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_BUS_EHCI0>,
<&ccu CLK_USB_OHCI0>;
<&ccu CLK_BUS_EHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>,
<&ccu RST_BUS_EHCI0>;
<&ccu RST_BUS_EHCI0>;
phys = <&usb2phy 0>;
phy-names = "usb";
status = "disabled";
@ -940,7 +940,7 @@
reg = <0x05101400 0x100>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>;
phys = <&usb2phy 0>;
phy-names = "usb";
@ -952,8 +952,8 @@
reg = <0x05200000 0x10000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_XHCI>,
<&ccu CLK_BUS_XHCI>,
<&rtc CLK_OSC32K>;
<&ccu CLK_BUS_XHCI>,
<&rtc CLK_OSC32K>;
clock-names = "ref", "bus_early", "suspend";
resets = <&ccu RST_BUS_XHCI>;
/*
@ -984,10 +984,10 @@
reg = <0x05311000 0x100>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI3>,
<&ccu CLK_BUS_EHCI3>,
<&ccu CLK_USB_OHCI3>;
<&ccu CLK_BUS_EHCI3>,
<&ccu CLK_USB_OHCI3>;
resets = <&ccu RST_BUS_OHCI3>,
<&ccu RST_BUS_EHCI3>;
<&ccu RST_BUS_EHCI3>;
phys = <&usb2phy 3>;
phy-names = "usb";
status = "disabled";
@ -998,7 +998,7 @@
reg = <0x05311400 0x100>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI3>,
<&ccu CLK_USB_OHCI3>;
<&ccu CLK_USB_OHCI3>;
resets = <&ccu RST_BUS_OHCI3>;
phys = <&usb2phy 3>;
phy-names = "usb";
@ -1010,21 +1010,21 @@
#size-cells = <2>;
compatible = "pine64,allwinner-h6-pcie-wrapped";
reg = <0x05400000 0x4000>,
<0x05410000 0x10000>;
<0x05410000 0x10000>;
reg-names = "dbi", "config";
device_type = "pci";
bus-range = <0x00 0xff>;
ranges = <0x81000000 0 0 0x05e00000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x05500000 0x05500000 0 0x00800000>; /* non-prefetchable memory */
0x82000000 0 0x05500000 0x05500000 0 0x00800000>; /* non-prefetchable memory */
num-lanes = <1>;
max-link-speed = <2>;
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi", "linkup";
clocks = <&ccu CLK_PCIE_REF_OUT>,
<&ccu CLK_PCIE_MAXI>,
<&ccu CLK_PCIE_AUX>,
<&ccu CLK_BUS_PCIE>;
<&ccu CLK_PCIE_MAXI>,
<&ccu CLK_PCIE_AUX>,
<&ccu CLK_BUS_PCIE>;
clock-names = "ref", "axi", "aux", "bus";
resets = <&ccu RST_PCIE_POWERUP>, <&ccu RST_BUS_PCIE>;
reset-names = "power", "bus";
@ -1042,10 +1042,10 @@
reg-io-width = <1>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>,
<&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
<&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
<&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>,
<&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>;
clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
"hdcp-bus";
"hdcp-bus";
resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>;
reset-names = "ctrl", "hdcp";
phys = <&hdmi_phy>;
@ -1086,9 +1086,9 @@
compatible = "allwinner,sun50i-h6-tcon-top";
reg = <0x06510000 0x1000>;
clocks = <&ccu CLK_BUS_TCON_TOP>,
<&ccu CLK_TCON_TV0>;
<&ccu CLK_TCON_TV0>;
clock-names = "bus",
"tcon-tv0";
"tcon-tv0";
clock-output-names = "tcon-top-tv0";
resets = <&ccu RST_BUS_TCON_TOP>;
#clock-cells = <1>;
@ -1142,13 +1142,13 @@
tcon_tv: lcd-controller@6515000 {
compatible = "allwinner,sun50i-h6-tcon-tv",
"allwinner,sun8i-r40-tcon-tv";
"allwinner,sun8i-r40-tcon-tv";
reg = <0x06515000 0x1000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_TCON_TV0>,
<&tcon_top CLK_TCON_TOP_TV0>;
<&tcon_top CLK_TCON_TOP_TV0>;
clock-names = "ahb",
"tcon-ch1";
"tcon-ch1";
resets = <&ccu RST_BUS_TCON_TV0>;
reset-names = "lcd";
@ -1195,7 +1195,7 @@
reg = <0x07000000 0x400>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clock-output-names = "osc32k", "osc32k-out", "iosc";
clocks = <&ext_osc32k>;
#clock-cells = <1>;
@ -1205,7 +1205,7 @@
compatible = "allwinner,sun50i-h6-r-ccu";
reg = <0x07010000 0x400>;
clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
<&ccu CLK_PLL_PERIPH0>;
<&ccu CLK_PLL_PERIPH0>;
clock-names = "hosc", "losc", "iosc", "pll-periph";
protected-clocks = <CLK_R_APB1_TWD>;
#clock-cells = <1>;
@ -1214,7 +1214,7 @@
r_watchdog: watchdog@7020400 {
compatible = "allwinner,sun50i-h6-wdt",
"allwinner,sun6i-a31-wdt";
"allwinner,sun6i-a31-wdt";
reg = <0x07020400 0x20>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
@ -1243,9 +1243,9 @@
reg = <0x07022000 0x400>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
<&rtc CLK_OSC32K>;
<&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
@ -1280,22 +1280,22 @@
};
r_ir: ir@7040000 {
compatible = "allwinner,sun50i-h6-ir",
"allwinner,sun6i-a31-ir";
reg = <0x07040000 0x400>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB1_IR>,
compatible = "allwinner,sun50i-h6-ir",
"allwinner,sun6i-a31-ir";
reg = <0x07040000 0x400>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB1_IR>,
<&r_ccu CLK_IR>;
clock-names = "apb", "ir";
resets = <&r_ccu RST_R_APB1_IR>;
pinctrl-names = "default";
pinctrl-0 = <&r_ir_rx_pin>;
status = "disabled";
clock-names = "apb", "ir";
resets = <&r_ccu RST_R_APB1_IR>;
pinctrl-names = "default";
pinctrl-0 = <&r_ir_rx_pin>;
status = "disabled";
};
r_i2c: i2c@7081400 {
compatible = "allwinner,sun50i-h6-i2c",
"allwinner,sun6i-a31-i2c";
"allwinner,sun6i-a31-i2c";
reg = <0x07081400 0x400>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB2_I2C>;