diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6 (pci-ok 11.10.24).dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6 (pci-ok 11.10.24).dtsi deleted file mode 100644 index f4c0cebab..000000000 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6 (pci-ok 11.10.24).dtsi +++ /dev/null @@ -1,1422 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -// Copyright (C) 2017 Icenowy Zheng -// Copyright (C) 2020 Igor Pecovnik - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/memreserve/ 0x40010000 0x00070000; - -/ { - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - mmc0 = &mmc0; - mmc1 = &mmc1; - mmc2 = &mmc2; - }; - - analog: analog-codec { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "ac200-audio"; - simple-audio-card,mclk-fs = <512>; - status = "disabled"; - - simple-audio-card,cpu { - sound-dai = <&i2s3>; - }; - - simple-audio-card,codec { - sound-dai = <&ac200_codec>; - }; - }; - - ac200_pwm_clk: ac200_clk { - compatible = "pwm-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; - pwms = <&pwm 1 42 0>; - status = "disabled"; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <0>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ - #cooling-cells = <2>; - }; - - cpu1: cpu@1 { - compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <1>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ - #cooling-cells = <2>; - }; - - cpu2: cpu@2 { - compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <2>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ - #cooling-cells = <2>; - }; - - cpu3: cpu@3 { - compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <3>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ - #cooling-cells = <2>; - }; - }; - - de: display-engine { - compatible = "allwinner,sun50i-h6-display-engine"; - allwinner,pipelines = <&mixer0>; - status = "disabled"; - }; - - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - sound_hdmi: sound_hdmi { - compatible = "allwinner,sun9i-a80-hdmi-audio", - "allwinner,sun50i-h6-hdmi-audio"; - status = "disabled"; - - codec { - sound-dai = <&hdmi>; - }; - - cpu { - sound-dai = <&i2s1>; - }; - }; - - scpi_protocol: scpi { - compatible = "arm,scpi"; - mboxes = <&msgbox 2>, <&msgbox 3>; - mbox-names = "tx", "rx"; - shmem = <&scpi_sram>; - }; - - timer { - compatible = "arm,armv8-timer"; - arm,no-tick-in-suspend; - interrupts = , - , - , - ; - }; - - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - bus@1000000 { - compatible = "allwinner,sun50i-h6-de3", - "allwinner,sun50i-a64-de2"; - reg = <0x1000000 0x400000>; - allwinner,sram = <&de2_sram 1>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x1000000 0x400000>; - - display_clocks: clock@0 { - compatible = "allwinner,sun50i-h6-de3-clk"; - reg = <0x0 0x10000>; - clocks = <&ccu CLK_BUS_DE>, - <&ccu CLK_DE>; - clock-names = "bus", - "mod"; - resets = <&ccu RST_BUS_DE>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mixer0: mixer@100000 { - compatible = "allwinner,sun50i-h6-de3-mixer-0"; - reg = <0x100000 0x100000>; - clocks = <&display_clocks CLK_BUS_MIXER0>, - <&display_clocks CLK_MIXER0>; - clock-names = "bus", - "mod"; - resets = <&display_clocks RST_MIXER0>; - iommus = <&iommu 0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer0_out: port@1 { - reg = <1>; - - mixer0_out_tcon_top_mixer0: endpoint { - remote-endpoint = <&tcon_top_mixer0_in_mixer0>; - }; - }; - }; - }; - }; - - video-codec-g2@1c00000 { - compatible = "allwinner,sun50i-h6-vpu-g2"; - reg = <0x01c00000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>; - clock-names = "bus", "mod"; - resets = <&ccu RST_BUS_VP9>; - iommus = <&iommu 5>; - }; - - video-codec@1c0e000 { - compatible = "allwinner,sun50i-h6-video-engine"; - reg = <0x01c0e000 0x2000>; - clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, - <&ccu CLK_MBUS_VE>; - clock-names = "ahb", "mod", "ram"; - resets = <&ccu RST_BUS_VE>; - interrupts = ; - allwinner,sram = <&ve_sram 1>; - iommus = <&iommu 3>; - }; - - gpu: gpu@1800000 { - compatible = "allwinner,sun50i-h6-mali", - "arm,mali-t720"; - reg = <0x01800000 0x4000>; - interrupts = , - , - ; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>; - clock-names = "core", "bus"; - resets = <&ccu RST_BUS_GPU>; - #cooling-cells = <2>; - status = "disabled"; - }; - - crypto: crypto@1904000 { - compatible = "allwinner,sun50i-h6-crypto"; - reg = <0x01904000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_MBUS_CE>; - clock-names = "bus", "mod", "ram"; - resets = <&ccu RST_BUS_CE>; - }; - - syscon: syscon@3000000 { - compatible = "allwinner,sun50i-h6-system-control", - "allwinner,sun50i-a64-system-control"; - reg = <0x03000000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - sram_a2: sram@100000 { - compatible = "mmio-sram"; - reg = <0x00100000 0x18000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00100000 0x18000>; - - scpi_sram: scp-shmem@17c00 { - compatible = "arm,scp-shmem"; - reg = <0x17c00 0x200>; - }; - }; - - sram_c: sram@28000 { - compatible = "mmio-sram"; - reg = <0x00028000 0x1e000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00028000 0x1e000>; - - de2_sram: sram-section@0 { - compatible = "allwinner,sun50i-h6-sram-c", - "allwinner,sun50i-a64-sram-c"; - reg = <0x0000 0x1e000>; - }; - }; - - sram_c1: sram@1a00000 { - compatible = "mmio-sram"; - reg = <0x01a00000 0x200000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x01a00000 0x200000>; - - ve_sram: sram-section@0 { - compatible = "allwinner,sun50i-h6-sram-c1", - "allwinner,sun4i-a10-sram-c1"; - reg = <0x000000 0x200000>; - }; - }; - }; - - ccu: clock@3001000 { - compatible = "allwinner,sun50i-h6-ccu"; - reg = <0x03001000 0x1000>; - clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>; - clock-names = "hosc", "losc", "iosc"; - protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - dma: dma-controller@3002000 { - compatible = "allwinner,sun50i-h6-dma"; - reg = <0x03002000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; - clock-names = "bus", "mbus"; - dma-channels = <16>; - dma-requests = <46>; - resets = <&ccu RST_BUS_DMA>; - #dma-cells = <1>; - }; - - msgbox: mailbox@3003000 { - compatible = "allwinner,sun50i-h6-msgbox", - "allwinner,sun6i-a31-msgbox"; - reg = <0x03003000 0x1000>; - clocks = <&ccu CLK_BUS_MSGBOX>; - resets = <&ccu RST_BUS_MSGBOX>; - interrupts = ; - #mbox-cells = <1>; - }; - - gic: interrupt-controller@3021000 { - compatible = "arm,gic-400"; - reg = <0x03021000 0x1000>, - <0x03022000 0x2000>, - <0x03024000 0x2000>, - <0x03026000 0x2000>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <3>; - }; - - sid: efuse@3006000 { - compatible = "allwinner,sun50i-h6-sid"; - reg = <0x03006000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - - ths_calibration: thermal-sensor-calibration@14 { - reg = <0x14 0x8>; - }; - - cpu_speed_grade: cpu-speed-grade@1c { - reg = <0x1c 0x4>; - }; - - ephy_calib: ephy_calib@2c { - reg = <0x2c 0x2>; - }; - - ac200_bg: ac200_bg@30 { - reg = <0x30 0x2>; - }; - }; - - timer@3009000 { - compatible = "allwinner,sun50i-h6-timer", - "allwinner,sun8i-a23-timer"; - reg = <0x03009000 0xa0>; - interrupts = , - ; - clocks = <&osc24M>; - }; - - watchdog: watchdog@30090a0 { - compatible = "allwinner,sun50i-h6-wdt", - "allwinner,sun6i-a31-wdt"; - reg = <0x030090a0 0x20>; - interrupts = ; - clocks = <&osc24M>; - /* Broken on some H6 boards */ - status = "disabled"; - }; - - pwm: pwm@300a000 { - compatible = "allwinner,sun50i-h6-pwm"; - reg = <0x0300a000 0x400>; - clocks = <&osc24M>, <&ccu CLK_BUS_PWM>; - clock-names = "mod", "bus"; - resets = <&ccu RST_BUS_PWM>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pio: pinctrl@300b000 { - compatible = "allwinner,sun50i-h6-pinctrl"; - reg = <0x0300b000 0x400>; - interrupt-parent = <&r_intc>; - interrupts = , - , - , - ; - clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - - /omit-if-no-ref/ - ext_rgmii_pins: rgmii-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", - "PD5", "PD7", "PD8", "PD9", "PD10", - "PD11", "PD12", "PD13", "PD19", "PD20"; - function = "emac"; - drive-strength = <40>; - }; - - ext_rmii_pins: rmii_pins { - pins = "PA0", "PA1", "PA2", "PA3", "PA4", - "PA5", "PA6", "PA7", "PA8", "PA9"; - function = "emac"; - drive-strength = <40>; - }; - - hdmi_pins: hdmi-pins { - pins = "PH8", "PH9", "PH10"; - function = "hdmi"; - }; - - i2c0_pins: i2c0-pins { - pins = "PD25", "PD26"; - function = "i2c0"; - }; - - i2c1_pins: i2c1-pins { - pins = "PH5", "PH6"; - function = "i2c1"; - }; - - i2c2_pins: i2c2-pins { - pins = "PD23", "PD24"; - function = "i2c2"; - }; - - i2c3_pins: i2c3-pins { - pins = "PB17", "PB18"; - function = "i2c3"; - bias-pull-up; - }; - - i2s3_pins: i2s3-pins { - pins = "PB12", "PB13", "PB14", "PB15", "PB16"; - function = "i2s3"; - }; - - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; - function = "mmc0"; - drive-strength = <30>; - bias-pull-up; - }; - - /omit-if-no-ref/ - mmc1_pins: mmc1-pins { - pins = "PG0", "PG1", "PG2", "PG3", - "PG4", "PG5"; - function = "mmc1"; - drive-strength = <30>; - bias-pull-up; - }; - - /omit-if-no-ref/ - mmc2_pins: mmc2-pins { - pins = "PC1", "PC4", "PC5", "PC6", - "PC7", "PC8", "PC9", "PC10", - "PC11", "PC12", "PC13", "PC14"; - function = "mmc2"; - drive-strength = <30>; - bias-pull-up; - }; - - pwm1_pin: pwm1-pin { - pins = "PB19"; - function = "pwm1"; - }; - - /omit-if-no-ref/ - spi0_pins: spi0-pins { - pins = "PC0", "PC2", "PC3"; - function = "spi0"; - }; - - /* pin shared with MMC2-CMD (eMMC) */ - /omit-if-no-ref/ - spi0_cs_pin: spi0-cs-pin { - pins = "PC5"; - function = "spi0"; - }; - - /omit-if-no-ref/ - spi1_pins: spi1-pins { - pins = "PH4", "PH5", "PH6"; - function = "spi1"; - }; - - /omit-if-no-ref/ - spi1_cs_pin: spi1-cs-pin { - pins = "PH3"; - function = "spi1"; - }; - - /omit-if-no-ref/ - spdif_tx_pin: spdif-tx-pin { - pins = "PH7"; - function = "spdif"; - }; - - uart0_ph_pins: uart0-ph-pins { - pins = "PH0", "PH1"; - function = "uart0"; - }; - - uart1_pins: uart1-pins { - pins = "PG6", "PG7"; - function = "uart1"; - }; - - uart1_rts_cts_pins: uart1-rts-cts-pins { - pins = "PG8", "PG9"; - function = "uart1"; - }; - - uart2_pins: uart2-pins { - pins = "PD19", "PD20"; - function = "uart2"; - }; - - uart2_rts_cts_pins: uart2-rts-cts-pins { - pins = "PD21", "PD22"; - function = "uart2"; - }; - - uart3_pins: uart3-pins { - pins = "PD23", "PD24"; - function = "uart3"; - }; - - uart3_rts_cts_pins: uart3-rts-cts-pins { - pins = "PD25", "PD26"; - function = "uart3"; - }; - }; - - iommu: iommu@30f0000 { - compatible = "allwinner,sun50i-h6-iommu"; - reg = <0x030f0000 0x10000>; - interrupts = ; - clocks = <&ccu CLK_BUS_IOMMU>; - resets = <&ccu RST_BUS_IOMMU>; - #iommu-cells = <1>; - }; - - mmc0: mmc@4020000 { - compatible = "allwinner,sun50i-h6-mmc", - "allwinner,sun50i-a64-mmc"; - reg = <0x04020000 0x1000>; - clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; - clock-names = "ahb", "mmc"; - resets = <&ccu RST_BUS_MMC0>; - reset-names = "ahb"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - max-frequency = <150000000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@4021000 { - compatible = "allwinner,sun50i-h6-mmc", - "allwinner,sun50i-a64-mmc"; - reg = <0x04021000 0x1000>; - clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; - clock-names = "ahb", "mmc"; - resets = <&ccu RST_BUS_MMC1>; - reset-names = "ahb"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; - max-frequency = <150000000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@4022000 { - compatible = "allwinner,sun50i-h6-emmc"; - reg = <0x04022000 0x1000>; - clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; - clock-names = "ahb", "mmc"; - resets = <&ccu RST_BUS_MMC2>; - reset-names = "ahb"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; - max-frequency = <150000000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - uart0: serial@5000000 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - status = "disabled"; - }; - - uart1: serial@5000400 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000400 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART1>; - resets = <&ccu RST_BUS_UART1>; - status = "disabled"; - }; - - uart2: serial@5000800 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000800 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART2>; - resets = <&ccu RST_BUS_UART2>; - status = "disabled"; - }; - - uart3: serial@5000c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000c00 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART3>; - resets = <&ccu RST_BUS_UART3>; - status = "disabled"; - }; - - i2c0: i2c@5002000 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x05002000 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2C0>; - resets = <&ccu RST_BUS_I2C0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@5002400 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x05002400 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2C1>; - resets = <&ccu RST_BUS_I2C1>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@5002800 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x05002800 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2C2>; - resets = <&ccu RST_BUS_I2C2>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c3: i2c@5002c00 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x05002c00 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2C3>; - resets = <&ccu RST_BUS_I2C3>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; - clock-frequency = <100000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - - ac200: mfd@10 { - compatible = "x-powers,ac200"; - reg = <0x10>; - clocks = <&ac200_pwm_clk>; - interrupt-parent = <&pio>; - interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <1>; - nvmem-cells = <&ac200_bg>; - nvmem-cell-names = "bandgap"; - - ac200_ephy_ctl: syscon { - compatible = "x-powers,ac200-ephy-ctl"; - nvmem-cells = <&ephy_calib>; - nvmem-cell-names = "calibration"; - #clock-cells = <0>; - #reset-cells = <0>; - phy-mode = "rmii"; - status = "disabled"; - }; - - ac200_codec: codec { - #sound-dai-cells = <0>; - compatible = "x-powers,ac200-codec"; - status = "disabled"; - }; - }; - }; - - spi0: spi@5010000 { - compatible = "allwinner,sun50i-h6-spi", - "allwinner,sun8i-h3-spi"; - reg = <0x05010000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; - clock-names = "ahb", "mod"; - dmas = <&dma 22>, <&dma 22>; - dma-names = "rx", "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>; - resets = <&ccu RST_BUS_SPI0>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@5011000 { - compatible = "allwinner,sun50i-h6-spi", - "allwinner,sun8i-h3-spi"; - reg = <0x05011000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; - clock-names = "ahb", "mod"; - dmas = <&dma 23>, <&dma 23>; - dma-names = "rx", "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins>, <&spi1_cs_pin>; - resets = <&ccu RST_BUS_SPI1>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - emac: ethernet@5020000 { - compatible = "allwinner,sun50i-h6-emac", - "allwinner,sun50i-a64-emac"; - syscon = <&syscon>; - reg = <0x05020000 0x10000>; - interrupts = ; - interrupt-names = "macirq"; - resets = <&ccu RST_BUS_EMAC>; - reset-names = "stmmaceth"; - clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "stmmaceth"; - status = "disabled"; - - mdio: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - i2s3: i2s@508f000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-i2s"; - reg = <0x0508f000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2S3>, <&ccu CLK_I2S3>; - clock-names = "apb", "mod"; - dmas = <&dma 6>, <&dma 6>; - resets = <&ccu RST_BUS_I2S3>; - dma-names = "rx", "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&i2s3_pins>; - status = "disabled"; - }; - - i2s1: i2s@5091000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-i2s"; - reg = <0x05091000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>; - clock-names = "apb", "mod"; - dmas = <&dma 4>, <&dma 4>; - resets = <&ccu RST_BUS_I2S1>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - spdif: spdif@5093000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-spdif"; - reg = <0x05093000 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; - clock-names = "apb", "spdif"; - resets = <&ccu RST_BUS_SPDIF>; - dmas = <&dma 2>, <&dma 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - usb2otg: usb@5100000 { - compatible = "allwinner,sun50i-h6-musb", - "allwinner,sun8i-a33-musb"; - reg = <0x05100000 0x0400>; - clocks = <&ccu CLK_BUS_OTG>; - resets = <&ccu RST_BUS_OTG>; - interrupts = ; - interrupt-names = "mc"; - phys = <&usb2phy 0>; - phy-names = "usb"; - extcon = <&usb2phy 0>; - status = "disabled"; - }; - - usb2phy: phy@5100400 { - compatible = "allwinner,sun50i-h6-usb-phy"; - reg = <0x05100400 0x24>, - <0x05101800 0x4>, - <0x05311800 0x4>; - reg-names = "phy_ctrl", - "pmu0", - "pmu3"; - clocks = <&ccu CLK_USB_PHY0>, - <&ccu CLK_USB_PHY3>; - clock-names = "usb0_phy", - "usb3_phy"; - resets = <&ccu RST_USB_PHY0>, - <&ccu RST_USB_PHY3>; - reset-names = "usb0_reset", - "usb3_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ehci0: usb@5101000 { - compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; - reg = <0x05101000 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_OHCI0>, - <&ccu CLK_BUS_EHCI0>, - <&ccu CLK_USB_OHCI0>; - resets = <&ccu RST_BUS_OHCI0>, - <&ccu RST_BUS_EHCI0>; - phys = <&usb2phy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@5101400 { - compatible = "allwinner,sun50i-h6-ohci", "generic-ohci"; - reg = <0x05101400 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_OHCI0>, - <&ccu CLK_USB_OHCI0>; - resets = <&ccu RST_BUS_OHCI0>; - phys = <&usb2phy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - dwc3: usb@5200000 { - compatible = "snps,dwc3"; - reg = <0x05200000 0x10000>; - interrupts = ; - clocks = <&ccu CLK_BUS_XHCI>, - <&ccu CLK_BUS_XHCI>, - <&rtc CLK_OSC32K>; - clock-names = "ref", "bus_early", "suspend"; - resets = <&ccu RST_BUS_XHCI>; - /* - * The datasheet of the chip doesn't declare the - * peripheral function, and there's no boards known - * to have a USB Type-B port routed to the port. - * In addition, no one has tested the peripheral - * function yet. - * So set the dr_mode to "host" in the DTSI file. - */ - dr_mode = "host"; - phys = <&usb3phy>; - phy-names = "usb3-phy"; - status = "disabled"; - }; - - usb3phy: phy@5210000 { - compatible = "allwinner,sun50i-h6-usb3-phy"; - reg = <0x5210000 0x10000>; - clocks = <&ccu CLK_USB_PHY1>; - resets = <&ccu RST_USB_PHY1>; - #phy-cells = <0>; - status = "disabled"; - }; - - ehci3: usb@5311000 { - compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; - reg = <0x05311000 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_OHCI3>, - <&ccu CLK_BUS_EHCI3>, - <&ccu CLK_USB_OHCI3>; - resets = <&ccu RST_BUS_OHCI3>, - <&ccu RST_BUS_EHCI3>; - phys = <&usb2phy 3>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci3: usb@5311400 { - compatible = "allwinner,sun50i-h6-ohci", "generic-ohci"; - reg = <0x05311400 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_OHCI3>, - <&ccu CLK_USB_OHCI3>; - resets = <&ccu RST_BUS_OHCI3>; - phys = <&usb2phy 3>; - phy-names = "usb"; - status = "disabled"; - }; - - pcie: pcie@5400000 { - #address-cells = <3>; - #size-cells = <2>; - compatible = "pine64,allwinner-h6-pcie-wrapped"; - reg = <0x05400000 0x4000>, - <0x05410000 0x10000>; - reg-names = "dbi", "config"; - device_type = "pci"; - bus-range = <0x00 0xff>; - ranges = <0x81000000 0 0 0x05e00000 0 0x00010000 /* downstream I/O */ - 0x82000000 0 0x05500000 0x05500000 0 0x00800000>; /* non-prefetchable memory */ - num-lanes = <1>; - max-link-speed = <2>; - interrupts = , - ; - interrupt-names = "msi", "linkup"; - clocks = <&ccu CLK_PCIE_REF_OUT>, - <&ccu CLK_PCIE_MAXI>, - <&ccu CLK_PCIE_AUX>, - <&ccu CLK_BUS_PCIE>; - clock-names = "ref", "axi", "aux", "bus"; - resets = <&ccu RST_PCIE_POWERUP>, <&ccu RST_BUS_PCIE>; - reset-names = "power", "bus"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - - hdmi: hdmi@6000000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-dw-hdmi"; - reg = <0x06000000 0x10000>; - reg-io-width = <1>; - interrupts = ; - clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>, - <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>, - <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>; - clock-names = "iahb", "isfr", "tmds", "cec", "hdcp", - "hdcp-bus"; - resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>; - reset-names = "ctrl", "hdcp"; - phys = <&hdmi_phy>; - phy-names = "phy"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_pins>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - hdmi_in: port@0 { - reg = <0>; - - hdmi_in_tcon_top: endpoint { - remote-endpoint = <&tcon_top_hdmi_out_hdmi>; - }; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - hdmi_phy: hdmi-phy@6010000 { - compatible = "allwinner,sun50i-h6-hdmi-phy"; - reg = <0x06010000 0x10000>; - clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>; - clock-names = "bus", "mod"; - resets = <&ccu RST_BUS_HDMI>; - reset-names = "phy"; - #phy-cells = <0>; - }; - - tcon_top: tcon-top@6510000 { - compatible = "allwinner,sun50i-h6-tcon-top"; - reg = <0x06510000 0x1000>; - clocks = <&ccu CLK_BUS_TCON_TOP>, - <&ccu CLK_TCON_TV0>; - clock-names = "bus", - "tcon-tv0"; - clock-output-names = "tcon-top-tv0"; - resets = <&ccu RST_BUS_TCON_TOP>; - #clock-cells = <1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - tcon_top_mixer0_in_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mixer0_out_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tcon_top_mixer0_out_tcon_tv: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>; - }; - }; - - tcon_top_hdmi_in: port@4 { - #address-cells = <1>; - #size-cells = <0>; - reg = <4>; - - tcon_top_hdmi_in_tcon_tv: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_tv_out_tcon_top>; - }; - }; - - tcon_top_hdmi_out: port@5 { - reg = <5>; - - tcon_top_hdmi_out_hdmi: endpoint { - remote-endpoint = <&hdmi_in_tcon_top>; - }; - }; - }; - }; - - tcon_tv: lcd-controller@6515000 { - compatible = "allwinner,sun50i-h6-tcon-tv", - "allwinner,sun8i-r40-tcon-tv"; - reg = <0x06515000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_TCON_TV0>, - <&tcon_top CLK_TCON_TOP_TV0>; - clock-names = "ahb", - "tcon-ch1"; - resets = <&ccu RST_BUS_TCON_TV0>; - reset-names = "lcd"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv_in: port@0 { - reg = <0>; - - tcon_tv_in_tcon_top_mixer0: endpoint { - remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>; - }; - }; - - tcon_tv_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tcon_tv_out_tcon_top: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>; - }; - }; - }; - }; - - r_uart: serial@7080000 { - compatible = "snps,dw-apb-uart"; - reg = <0x07080000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&r_ccu CLK_R_APB2_UART>; - resets = <&r_ccu RST_R_APB2_UART>; - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins>; - status = "disabled"; - }; - - rtc: rtc@7000000 { - compatible = "allwinner,sun50i-h6-rtc"; - reg = <0x07000000 0x400>; - interrupt-parent = <&r_intc>; - interrupts = , - ; - clock-output-names = "osc32k", "osc32k-out", "iosc"; - #clock-cells = <1>; - }; - - r_ccu: clock@7010000 { - compatible = "allwinner,sun50i-h6-r-ccu"; - reg = <0x07010000 0x400>; - clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, - <&ccu CLK_PLL_PERIPH0>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - r_watchdog: watchdog@7020400 { - compatible = "allwinner,sun50i-h6-wdt", - "allwinner,sun6i-a31-wdt"; - reg = <0x07020400 0x20>; - interrupts = ; - clocks = <&osc24M>; - }; - - r_intc: interrupt-controller@7021000 { - compatible = "allwinner,sun50i-h6-r-intc"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x07021000 0x400>; - interrupts = ; - }; - - r_pio: pinctrl@7022000 { - compatible = "allwinner,sun50i-h6-r-pinctrl"; - reg = <0x07022000 0x400>; - interrupt-parent = <&r_intc>; - interrupts = , - ; - clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, - <&rtc CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - - r_i2c_pins: r-i2c-pins { - pins = "PL0", "PL1"; - function = "s_i2c"; - }; - - r_ir_rx_pin: r-ir-rx-pin { - pins = "PL9"; - function = "s_cir_rx"; - }; - - r_rsb_pins: r-rsb-pins { - pins = "PL0", "PL1"; - function = "s_rsb"; - }; - - r_uart_pins: r-uart-pins { - pins = "PL2", "PL3"; - function = "s_uart"; - }; - }; - - r_ir: ir@7040000 { - compatible = "allwinner,sun50i-h6-ir", - "allwinner,sun6i-a31-ir"; - reg = <0x07040000 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_R_APB1_IR>, - <&r_ccu CLK_IR>; - clock-names = "apb", "ir"; - resets = <&r_ccu RST_R_APB1_IR>; - pinctrl-names = "default"; - pinctrl-0 = <&r_ir_rx_pin>; - status = "disabled"; - }; - - r_i2c: i2c@7081400 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x07081400 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_R_APB2_I2C>; - resets = <&r_ccu RST_R_APB2_I2C>; - pinctrl-names = "default"; - pinctrl-0 = <&r_i2c_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - r_rsb: rsb@7083000 { - compatible = "allwinner,sun8i-a23-rsb"; - reg = <0x07083000 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_R_APB2_RSB>; - clock-frequency = <3000000>; - resets = <&r_ccu RST_R_APB2_RSB>; - pinctrl-names = "default"; - pinctrl-0 = <&r_rsb_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - ths: thermal-sensor@5070400 { - compatible = "allwinner,sun50i-h6-ths"; - reg = <0x05070400 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_THS>; - clock-names = "bus"; - resets = <&ccu RST_BUS_THS>; - nvmem-cells = <&ths_calibration>; - nvmem-cell-names = "calibration"; - #thermal-sensor-cells = <1>; - }; - - sunxi-info { - compatible = "allwinner,sun50i-h6-sys-info"; - status = "okay"; - }; - - addr_mgt: addr-mgt { - compatible = "allwinner,sunxi-addr_mgt"; - type_addr_wifi = <0x2>; - type_addr_bt = <0x2>; - type_addr_eth = <0x2>; - status = "okay"; - }; - - dump_reg: dump_reg@20000 { - compatible = "allwinner,sunxi-dump-reg"; - reg = <0x0 0x03001000 0x0 0x0f20>; - status = "okay"; - }; - }; - - thermal-zones { - cpu-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&ths 0>; - - trips { - cpu_warm: cpu_warm { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_hot_pre: cpu_hot_pre { - temperature = <80000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_hot: cpu_hot { - temperature = <85000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_very_hot_pre: cpu_very_hot_pre { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_very_hot: cpu_very_hot { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_crit: cpu_crit { - temperature = <105000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - cpu_warm_limit_cpu { - trip = <&cpu_warm>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>; - }; - - cpu_hot_pre_limit_cpu { - trip = <&cpu_hot_pre>; - cooling-device = <&cpu0 2 3>; - }; - - cpu_hot_limit_cpu { - trip = <&cpu_hot>; - cooling-device = <&cpu0 3 4>; - }; - - cpu_very_hot_pre_limit_cpu { - trip = <&cpu_very_hot_pre>; - cooling-device = <&cpu0 5 6>; - }; - - cpu_very_hot_limit_cpu { - trip = <&cpu_very_hot>; - cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <2000>; - thermal-sensors = <&ths 1>; - - trips { - gpu_alert0: gpu-alert-0 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - gpu_alert1: gpu-alert-1 { - temperature = <100000>; - hysteresis = <2000>; - type = "passive"; - }; - - gpu_alert2: gpu-alert-2 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - - gpu-crit { - temperature = <115000>; - hysteresis = <0>; - type = "critical"; - }; - }; - - cooling-maps { - // Forbid the GPU to go over 756MHz - map0 { - trip = <&gpu_alert0>; - cooling-device = <&gpu 1 THERMAL_NO_LIMIT>; - }; - - // Forbid the GPU to go over 624MHz - map1 { - trip = <&gpu_alert1>; - cooling-device = <&gpu 2 THERMAL_NO_LIMIT>; - }; - - // Forbid the GPU to go over 576MHz - map2 { - trip = <&gpu_alert2>; - cooling-device = <&gpu 3 THERMAL_NO_LIMIT>; - }; - }; - }; - }; -}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6 (копия).dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6 (копия).dtsi deleted file mode 100644 index d01c5c72f..000000000 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6 (копия).dtsi +++ /dev/null @@ -1,1390 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -// Copyright (C) 2017 Icenowy Zheng -// Copyright (C) 2020 Igor Pecovnik - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/ { - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; - - aliases { - mmc0 = &mmc0; - mmc1 = &mmc1; - mmc2 = &mmc2; - }; - - analog: analog-codec { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,name = "ac200-audio"; - simple-audio-card,mclk-fs = <512>; - status = "disabled"; - - simple-audio-card,cpu { - sound-dai = <&i2s3>; - }; - - simple-audio-card,codec { - sound-dai = <&ac200_codec>; - }; - }; - - ac200_pwm_clk: ac200_clk { - compatible = "pwm-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; - pwms = <&pwm 1 42 0>; - status = "disabled"; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <0>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ - #cooling-cells = <2>; - }; - - cpu1: cpu@1 { - compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <1>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ - #cooling-cells = <2>; - }; - - cpu2: cpu@2 { - compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <2>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ - #cooling-cells = <2>; - }; - - cpu3: cpu@3 { - compatible = "arm,cortex-a53"; - device_type = "cpu"; - reg = <3>; - enable-method = "psci"; - clocks = <&ccu CLK_CPUX>; - clock-latency-ns = <244144>; /* 8 32k periods */ - #cooling-cells = <2>; - }; - }; - - de: display-engine { - compatible = "allwinner,sun50i-h6-display-engine"; - allwinner,pipelines = <&mixer0>; - status = "disabled"; - }; - - osc24M: osc24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "osc24M"; - }; - - pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - psci { - compatible = "arm,psci-0.2"; - method = "smc"; - }; - - sound_hdmi: sound_hdmi { - compatible = "allwinner,sun9i-a80-hdmi-audio", - "allwinner,sun50i-h6-hdmi-audio"; - status = "disabled"; - - codec { - sound-dai = <&hdmi>; - }; - - cpu { - sound-dai = <&i2s1>; - }; - }; - - scpi_protocol: scpi { - compatible = "arm,scpi"; - mboxes = <&msgbox 2>, <&msgbox 3>; - mbox-names = "tx", "rx"; - shmem = <&scpi_sram>; - }; - - timer { - compatible = "arm,armv8-timer"; - arm,no-tick-in-suspend; - interrupts = , - , - , - ; - }; - - - soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - bus@1000000 { - compatible = "allwinner,sun50i-h6-de3", - "allwinner,sun50i-a64-de2"; - reg = <0x1000000 0x400000>; - allwinner,sram = <&de2_sram 1>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x1000000 0x400000>; - - display_clocks: clock@0 { - compatible = "allwinner,sun50i-h6-de3-clk"; - reg = <0x0 0x10000>; - clocks = <&ccu CLK_BUS_DE>, - <&ccu CLK_DE>; - clock-names = "bus", - "mod"; - resets = <&ccu RST_BUS_DE>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mixer0: mixer@100000 { - compatible = "allwinner,sun50i-h6-de3-mixer-0"; - reg = <0x100000 0x100000>; - clocks = <&display_clocks CLK_BUS_MIXER0>, - <&display_clocks CLK_MIXER0>; - clock-names = "bus", - "mod"; - resets = <&display_clocks RST_MIXER0>; - iommus = <&iommu 0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer0_out: port@1 { - reg = <1>; - - mixer0_out_tcon_top_mixer0: endpoint { - remote-endpoint = <&tcon_top_mixer0_in_mixer0>; - }; - }; - }; - }; - }; - - video-codec-g2@1c00000 { - compatible = "allwinner,sun50i-h6-vpu-g2"; - reg = <0x01c00000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>; - clock-names = "bus", "mod"; - resets = <&ccu RST_BUS_VP9>; - iommus = <&iommu 5>; - }; - - video-codec@1c0e000 { - compatible = "allwinner,sun50i-h6-video-engine"; - reg = <0x01c0e000 0x2000>; - clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, - <&ccu CLK_MBUS_VE>; - clock-names = "ahb", "mod", "ram"; - resets = <&ccu RST_BUS_VE>; - interrupts = ; - allwinner,sram = <&ve_sram 1>; - iommus = <&iommu 3>; - }; - - gpu: gpu@1800000 { - compatible = "allwinner,sun50i-h6-mali", - "arm,mali-t720"; - reg = <0x01800000 0x4000>; - interrupts = , - , - ; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>; - clock-names = "core", "bus"; - resets = <&ccu RST_BUS_GPU>; - #cooling-cells = <2>; - status = "disabled"; - }; - - crypto: crypto@1904000 { - compatible = "allwinner,sun50i-h6-crypto"; - reg = <0x01904000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_MBUS_CE>; - clock-names = "bus", "mod", "ram"; - resets = <&ccu RST_BUS_CE>; - }; - - syscon: syscon@3000000 { - compatible = "allwinner,sun50i-h6-system-control", - "allwinner,sun50i-a64-system-control"; - reg = <0x03000000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - ranges; - - sram_a2: sram@100000 { - compatible = "mmio-sram"; - reg = <0x00100000 0x18000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00100000 0x18000>; - - scpi_sram: scp-shmem@17c00 { - compatible = "arm,scp-shmem"; - reg = <0x17c00 0x200>; - }; - }; - - sram_c: sram@28000 { - compatible = "mmio-sram"; - reg = <0x00028000 0x1e000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x00028000 0x1e000>; - - de2_sram: sram-section@0 { - compatible = "allwinner,sun50i-h6-sram-c", - "allwinner,sun50i-a64-sram-c"; - reg = <0x0000 0x1e000>; - }; - }; - - sram_c1: sram@1a00000 { - compatible = "mmio-sram"; - reg = <0x01a00000 0x200000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x01a00000 0x200000>; - - ve_sram: sram-section@0 { - compatible = "allwinner,sun50i-h6-sram-c1", - "allwinner,sun4i-a10-sram-c1"; - reg = <0x000000 0x200000>; - }; - }; - }; - - ccu: clock@3001000 { - compatible = "allwinner,sun50i-h6-ccu"; - reg = <0x03001000 0x1000>; - clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>; - clock-names = "hosc", "losc", "iosc"; - protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - dma: dma-controller@3002000 { - compatible = "allwinner,sun50i-h6-dma"; - reg = <0x03002000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; - clock-names = "bus", "mbus"; - dma-channels = <16>; - dma-requests = <46>; - resets = <&ccu RST_BUS_DMA>; - #dma-cells = <1>; - }; - - msgbox: mailbox@3003000 { - compatible = "allwinner,sun50i-h6-msgbox", - "allwinner,sun6i-a31-msgbox"; - reg = <0x03003000 0x1000>; - clocks = <&ccu CLK_BUS_MSGBOX>; - resets = <&ccu RST_BUS_MSGBOX>; - interrupts = ; - #mbox-cells = <1>; - }; - - gic: interrupt-controller@3021000 { - compatible = "arm,gic-400"; - reg = <0x03021000 0x1000>, - <0x03022000 0x2000>, - <0x03024000 0x2000>, - <0x03026000 0x2000>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <3>; - }; - - sid: efuse@3006000 { - compatible = "allwinner,sun50i-h6-sid"; - reg = <0x03006000 0x400>; - #address-cells = <1>; - #size-cells = <1>; - - ths_calibration: thermal-sensor-calibration@14 { - reg = <0x14 0x8>; - }; - - cpu_speed_grade: cpu-speed-grade@1c { - reg = <0x1c 0x4>; - }; - - ephy_calib: ephy_calib@2c { - reg = <0x2c 0x2>; - }; - - ac200_bg: ac200_bg@30 { - reg = <0x30 0x2>; - }; - }; - - timer@3009000 { - compatible = "allwinner,sun50i-h6-timer", - "allwinner,sun8i-a23-timer"; - reg = <0x03009000 0xa0>; - interrupts = , - ; - clocks = <&osc24M>; - }; - - watchdog: watchdog@30090a0 { - compatible = "allwinner,sun50i-h6-wdt", - "allwinner,sun6i-a31-wdt"; - reg = <0x030090a0 0x20>; - interrupts = ; - clocks = <&osc24M>; - /* Broken on some H6 boards */ - status = "disabled"; - }; - - pwm: pwm@300a000 { - compatible = "allwinner,sun50i-h6-pwm"; - reg = <0x0300a000 0x400>; - clocks = <&osc24M>, <&ccu CLK_BUS_PWM>; - clock-names = "mod", "bus"; - resets = <&ccu RST_BUS_PWM>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pio: pinctrl@300b000 { - compatible = "allwinner,sun50i-h6-pinctrl"; - reg = <0x0300b000 0x400>; - interrupt-parent = <&r_intc>; - interrupts = , - , - , - ; - clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - - /omit-if-no-ref/ - ext_rgmii_pins: rgmii-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", - "PD5", "PD7", "PD8", "PD9", "PD10", - "PD11", "PD12", "PD13", "PD19", "PD20"; - function = "emac"; - drive-strength = <40>; - }; - - ext_rmii_pins: rmii_pins { - pins = "PA0", "PA1", "PA2", "PA3", "PA4", - "PA5", "PA6", "PA7", "PA8", "PA9"; - function = "emac"; - drive-strength = <40>; - }; - - hdmi_pins: hdmi-pins { - pins = "PH8", "PH9", "PH10"; - function = "hdmi"; - }; - - i2c0_pins: i2c0-pins { - pins = "PD25", "PD26"; - function = "i2c0"; - }; - - i2c1_pins: i2c1-pins { - pins = "PH5", "PH6"; - function = "i2c1"; - }; - - i2c2_pins: i2c2-pins { - pins = "PD23", "PD24"; - function = "i2c2"; - }; - - i2c3_pins: i2c3-pins { - pins = "PB17", "PB18"; - function = "i2c3"; - bias-pull-up; - }; - - i2s3_pins: i2s3-pins { - pins = "PB12", "PB13", "PB14", "PB15", "PB16"; - function = "i2s3"; - }; - - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", - "PF4", "PF5"; - function = "mmc0"; - drive-strength = <30>; - bias-pull-up; - }; - - /omit-if-no-ref/ - mmc1_pins: mmc1-pins { - pins = "PG0", "PG1", "PG2", "PG3", - "PG4", "PG5"; - function = "mmc1"; - drive-strength = <30>; - bias-pull-up; - }; - - /omit-if-no-ref/ - mmc2_pins: mmc2-pins { - pins = "PC1", "PC4", "PC5", "PC6", - "PC7", "PC8", "PC9", "PC10", - "PC11", "PC12", "PC13", "PC14"; - function = "mmc2"; - drive-strength = <30>; - bias-pull-up; - }; - - pwm1_pin: pwm1-pin { - pins = "PB19"; - function = "pwm1"; - }; - - /omit-if-no-ref/ - spi0_pins: spi0-pins { - pins = "PC0", "PC2", "PC3"; - function = "spi0"; - }; - - /* pin shared with MMC2-CMD (eMMC) */ - /omit-if-no-ref/ - spi0_cs_pin: spi0-cs-pin { - pins = "PC5"; - function = "spi0"; - }; - - /omit-if-no-ref/ - spi1_pins: spi1-pins { - pins = "PH4", "PH5", "PH6"; - function = "spi1"; - }; - - /omit-if-no-ref/ - spi1_cs_pin: spi1-cs-pin { - pins = "PH3"; - function = "spi1"; - }; - - /omit-if-no-ref/ - spdif_tx_pin: spdif-tx-pin { - pins = "PH7"; - function = "spdif"; - }; - - uart0_ph_pins: uart0-ph-pins { - pins = "PH0", "PH1"; - function = "uart0"; - }; - - uart1_pins: uart1-pins { - pins = "PG6", "PG7"; - function = "uart1"; - }; - - uart1_rts_cts_pins: uart1-rts-cts-pins { - pins = "PG8", "PG9"; - function = "uart1"; - }; - - uart2_pins: uart2-pins { - pins = "PD19", "PD20"; - function = "uart2"; - }; - - uart2_rts_cts_pins: uart2-rts-cts-pins { - pins = "PD21", "PD22"; - function = "uart2"; - }; - - uart3_pins: uart3-pins { - pins = "PD23", "PD24"; - function = "uart3"; - }; - - uart3_rts_cts_pins: uart3-rts-cts-pins { - pins = "PD25", "PD26"; - function = "uart3"; - }; - }; - - iommu: iommu@30f0000 { - compatible = "allwinner,sun50i-h6-iommu"; - reg = <0x030f0000 0x10000>; - interrupts = ; - clocks = <&ccu CLK_BUS_IOMMU>; - resets = <&ccu RST_BUS_IOMMU>; - #iommu-cells = <1>; - }; - - mmc0: mmc@4020000 { - compatible = "allwinner,sun50i-h6-mmc", - "allwinner,sun50i-a64-mmc"; - reg = <0x04020000 0x1000>; - clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; - clock-names = "ahb", "mmc"; - resets = <&ccu RST_BUS_MMC0>; - reset-names = "ahb"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - max-frequency = <150000000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@4021000 { - compatible = "allwinner,sun50i-h6-mmc", - "allwinner,sun50i-a64-mmc"; - reg = <0x04021000 0x1000>; - clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; - clock-names = "ahb", "mmc"; - resets = <&ccu RST_BUS_MMC1>; - reset-names = "ahb"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins>; - max-frequency = <150000000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@4022000 { - compatible = "allwinner,sun50i-h6-emmc"; - reg = <0x04022000 0x1000>; - clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; - clock-names = "ahb", "mmc"; - resets = <&ccu RST_BUS_MMC2>; - reset-names = "ahb"; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_pins>; - max-frequency = <150000000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - uart0: serial@5000000 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - status = "disabled"; - }; - - uart1: serial@5000400 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000400 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART1>; - resets = <&ccu RST_BUS_UART1>; - status = "disabled"; - }; - - uart2: serial@5000800 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000800 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART2>; - resets = <&ccu RST_BUS_UART2>; - status = "disabled"; - }; - - uart3: serial@5000c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x05000c00 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&ccu CLK_BUS_UART3>; - resets = <&ccu RST_BUS_UART3>; - status = "disabled"; - }; - - i2c0: i2c@5002000 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x05002000 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2C0>; - resets = <&ccu RST_BUS_I2C0>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@5002400 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x05002400 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2C1>; - resets = <&ccu RST_BUS_I2C1>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@5002800 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x05002800 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2C2>; - resets = <&ccu RST_BUS_I2C2>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c3: i2c@5002c00 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x05002c00 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2C3>; - resets = <&ccu RST_BUS_I2C3>; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; - clock-frequency = <100000>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - - ac200: mfd@10 { - compatible = "x-powers,ac200"; - reg = <0x10>; - clocks = <&ac200_pwm_clk>; - interrupt-parent = <&pio>; - interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <1>; - nvmem-cells = <&ac200_bg>; - nvmem-cell-names = "bandgap"; - - ac200_ephy_ctl: syscon { - compatible = "x-powers,ac200-ephy-ctl"; - nvmem-cells = <&ephy_calib>; - nvmem-cell-names = "calibration"; - #clock-cells = <0>; - #reset-cells = <0>; - phy-mode = "rmii"; - status = "disabled"; - }; - - ac200_codec: codec { - #sound-dai-cells = <0>; - compatible = "x-powers,ac200-codec"; - status = "disabled"; - }; - }; - }; - - spi0: spi@5010000 { - compatible = "allwinner,sun50i-h6-spi", - "allwinner,sun8i-h3-spi"; - reg = <0x05010000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; - clock-names = "ahb", "mod"; - dmas = <&dma 22>, <&dma 22>; - dma-names = "rx", "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>; - resets = <&ccu RST_BUS_SPI0>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@5011000 { - compatible = "allwinner,sun50i-h6-spi", - "allwinner,sun8i-h3-spi"; - reg = <0x05011000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; - clock-names = "ahb", "mod"; - dmas = <&dma 23>, <&dma 23>; - dma-names = "rx", "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins>, <&spi1_cs_pin>; - resets = <&ccu RST_BUS_SPI1>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - emac: ethernet@5020000 { - compatible = "allwinner,sun50i-h6-emac", - "allwinner,sun50i-a64-emac"; - syscon = <&syscon>; - reg = <0x05020000 0x10000>; - interrupts = ; - interrupt-names = "macirq"; - resets = <&ccu RST_BUS_EMAC>; - reset-names = "stmmaceth"; - clocks = <&ccu CLK_BUS_EMAC>; - clock-names = "stmmaceth"; - status = "disabled"; - - mdio: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - i2s3: i2s@508f000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-i2s"; - reg = <0x0508f000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2S3>, <&ccu CLK_I2S3>; - clock-names = "apb", "mod"; - dmas = <&dma 6>, <&dma 6>; - resets = <&ccu RST_BUS_I2S3>; - dma-names = "rx", "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&i2s3_pins>; - status = "disabled"; - }; - - i2s1: i2s@5091000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-i2s"; - reg = <0x05091000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>; - clock-names = "apb", "mod"; - dmas = <&dma 4>, <&dma 4>; - resets = <&ccu RST_BUS_I2S1>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - spdif: spdif@5093000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-spdif"; - reg = <0x05093000 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; - clock-names = "apb", "spdif"; - resets = <&ccu RST_BUS_SPDIF>; - dmas = <&dma 2>, <&dma 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - usb2otg: usb@5100000 { - compatible = "allwinner,sun50i-h6-musb", - "allwinner,sun8i-a33-musb"; - reg = <0x05100000 0x0400>; - clocks = <&ccu CLK_BUS_OTG>; - resets = <&ccu RST_BUS_OTG>; - interrupts = ; - interrupt-names = "mc"; - phys = <&usb2phy 0>; - phy-names = "usb"; - extcon = <&usb2phy 0>; - status = "disabled"; - }; - - usb2phy: phy@5100400 { - compatible = "allwinner,sun50i-h6-usb-phy"; - reg = <0x05100400 0x24>, - <0x05101800 0x4>, - <0x05311800 0x4>; - reg-names = "phy_ctrl", - "pmu0", - "pmu3"; - clocks = <&ccu CLK_USB_PHY0>, - <&ccu CLK_USB_PHY3>; - clock-names = "usb0_phy", - "usb3_phy"; - resets = <&ccu RST_USB_PHY0>, - <&ccu RST_USB_PHY3>; - reset-names = "usb0_reset", - "usb3_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ehci0: usb@5101000 { - compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; - reg = <0x05101000 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_OHCI0>, - <&ccu CLK_BUS_EHCI0>, - <&ccu CLK_USB_OHCI0>; - resets = <&ccu RST_BUS_OHCI0>, - <&ccu RST_BUS_EHCI0>; - phys = <&usb2phy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@5101400 { - compatible = "allwinner,sun50i-h6-ohci", "generic-ohci"; - reg = <0x05101400 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_OHCI0>, - <&ccu CLK_USB_OHCI0>; - resets = <&ccu RST_BUS_OHCI0>; - phys = <&usb2phy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - dwc3: usb@5200000 { - compatible = "snps,dwc3"; - reg = <0x05200000 0x10000>; - interrupts = ; - clocks = <&ccu CLK_BUS_XHCI>, - <&ccu CLK_BUS_XHCI>, - <&rtc CLK_OSC32K>; - clock-names = "ref", "bus_early", "suspend"; - resets = <&ccu RST_BUS_XHCI>; - /* - * The datasheet of the chip doesn't declare the - * peripheral function, and there's no boards known - * to have a USB Type-B port routed to the port. - * In addition, no one has tested the peripheral - * function yet. - * So set the dr_mode to "host" in the DTSI file. - */ - dr_mode = "host"; - phys = <&usb3phy>; - phy-names = "usb3-phy"; - status = "disabled"; - }; - - usb3phy: phy@5210000 { - compatible = "allwinner,sun50i-h6-usb3-phy"; - reg = <0x5210000 0x10000>; - clocks = <&ccu CLK_USB_PHY1>; - resets = <&ccu RST_USB_PHY1>; - #phy-cells = <0>; - status = "disabled"; - }; - - ehci3: usb@5311000 { - compatible = "allwinner,sun50i-h6-ehci", "generic-ehci"; - reg = <0x05311000 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_OHCI3>, - <&ccu CLK_BUS_EHCI3>, - <&ccu CLK_USB_OHCI3>; - resets = <&ccu RST_BUS_OHCI3>, - <&ccu RST_BUS_EHCI3>; - phys = <&usb2phy 3>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci3: usb@5311400 { - compatible = "allwinner,sun50i-h6-ohci", "generic-ohci"; - reg = <0x05311400 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_OHCI3>, - <&ccu CLK_USB_OHCI3>; - resets = <&ccu RST_BUS_OHCI3>; - phys = <&usb2phy 3>; - phy-names = "usb"; - status = "disabled"; - }; - - hdmi: hdmi@6000000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sun50i-h6-dw-hdmi"; - reg = <0x06000000 0x10000>; - reg-io-width = <1>; - interrupts = ; - clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>, - <&ccu CLK_HDMI>, <&ccu CLK_HDMI_CEC>, - <&ccu CLK_HDCP>, <&ccu CLK_BUS_HDCP>; - clock-names = "iahb", "isfr", "tmds", "cec", "hdcp", - "hdcp-bus"; - resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDCP>; - reset-names = "ctrl", "hdcp"; - phys = <&hdmi_phy>; - phy-names = "phy"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_pins>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - hdmi_in: port@0 { - reg = <0>; - - hdmi_in_tcon_top: endpoint { - remote-endpoint = <&tcon_top_hdmi_out_hdmi>; - }; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - hdmi_phy: hdmi-phy@6010000 { - compatible = "allwinner,sun50i-h6-hdmi-phy"; - reg = <0x06010000 0x10000>; - clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_SLOW>; - clock-names = "bus", "mod"; - resets = <&ccu RST_BUS_HDMI>; - reset-names = "phy"; - #phy-cells = <0>; - }; - - tcon_top: tcon-top@6510000 { - compatible = "allwinner,sun50i-h6-tcon-top"; - reg = <0x06510000 0x1000>; - clocks = <&ccu CLK_BUS_TCON_TOP>, - <&ccu CLK_TCON_TV0>; - clock-names = "bus", - "tcon-tv0"; - clock-output-names = "tcon-top-tv0"; - resets = <&ccu RST_BUS_TCON_TOP>; - #clock-cells = <1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - tcon_top_mixer0_in_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&mixer0_out_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tcon_top_mixer0_out_tcon_tv: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv_in_tcon_top_mixer0>; - }; - }; - - tcon_top_hdmi_in: port@4 { - #address-cells = <1>; - #size-cells = <0>; - reg = <4>; - - tcon_top_hdmi_in_tcon_tv: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_tv_out_tcon_top>; - }; - }; - - tcon_top_hdmi_out: port@5 { - reg = <5>; - - tcon_top_hdmi_out_hdmi: endpoint { - remote-endpoint = <&hdmi_in_tcon_top>; - }; - }; - }; - }; - - tcon_tv: lcd-controller@6515000 { - compatible = "allwinner,sun50i-h6-tcon-tv", - "allwinner,sun8i-r40-tcon-tv"; - reg = <0x06515000 0x1000>; - interrupts = ; - clocks = <&ccu CLK_BUS_TCON_TV0>, - <&tcon_top CLK_TCON_TOP_TV0>; - clock-names = "ahb", - "tcon-ch1"; - resets = <&ccu RST_BUS_TCON_TV0>; - reset-names = "lcd"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv_in: port@0 { - reg = <0>; - - tcon_tv_in_tcon_top_mixer0: endpoint { - remote-endpoint = <&tcon_top_mixer0_out_tcon_tv>; - }; - }; - - tcon_tv_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tcon_tv_out_tcon_top: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_hdmi_in_tcon_tv>; - }; - }; - }; - }; - - r_uart: serial@7080000 { - compatible = "snps,dw-apb-uart"; - reg = <0x07080000 0x400>; - interrupts = ; - reg-shift = <2>; - reg-io-width = <4>; - clocks = <&r_ccu CLK_R_APB2_UART>; - resets = <&r_ccu RST_R_APB2_UART>; - pinctrl-names = "default"; - pinctrl-0 = <&r_uart_pins>; - status = "disabled"; - }; - - rtc: rtc@7000000 { - compatible = "allwinner,sun50i-h6-rtc"; - reg = <0x07000000 0x400>; - interrupt-parent = <&r_intc>; - interrupts = , - ; - clock-output-names = "osc32k", "osc32k-out", "iosc"; - #clock-cells = <1>; - }; - - r_ccu: clock@7010000 { - compatible = "allwinner,sun50i-h6-r-ccu"; - reg = <0x07010000 0x400>; - clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>, - <&ccu CLK_PLL_PERIPH0>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - protected-clocks = ; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - r_watchdog: watchdog@7020400 { - compatible = "allwinner,sun50i-h6-wdt", - "allwinner,sun6i-a31-wdt"; - reg = <0x07020400 0x20>; - interrupts = ; - clocks = <&osc24M>; - }; - - r_intc: interrupt-controller@7021000 { - compatible = "allwinner,sun50i-h6-r-intc"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x07021000 0x400>; - interrupts = ; - }; - - r_pio: pinctrl@7022000 { - compatible = "allwinner,sun50i-h6-r-pinctrl"; - reg = <0x07022000 0x400>; - interrupt-parent = <&r_intc>; - interrupts = , - ; - clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, - <&rtc CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - - r_i2c_pins: r-i2c-pins { - pins = "PL0", "PL1"; - function = "s_i2c"; - }; - - r_ir_rx_pin: r-ir-rx-pin { - pins = "PL9"; - function = "s_cir_rx"; - }; - - r_rsb_pins: r-rsb-pins { - pins = "PL0", "PL1"; - function = "s_rsb"; - }; - - r_uart_pins: r-uart-pins { - pins = "PL2", "PL3"; - function = "s_uart"; - }; - }; - - r_ir: ir@7040000 { - compatible = "allwinner,sun50i-h6-ir", - "allwinner,sun6i-a31-ir"; - reg = <0x07040000 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_R_APB1_IR>, - <&r_ccu CLK_IR>; - clock-names = "apb", "ir"; - resets = <&r_ccu RST_R_APB1_IR>; - pinctrl-names = "default"; - pinctrl-0 = <&r_ir_rx_pin>; - status = "disabled"; - }; - - r_i2c: i2c@7081400 { - compatible = "allwinner,sun50i-h6-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x07081400 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_R_APB2_I2C>; - resets = <&r_ccu RST_R_APB2_I2C>; - pinctrl-names = "default"; - pinctrl-0 = <&r_i2c_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - r_rsb: rsb@7083000 { - compatible = "allwinner,sun8i-a23-rsb"; - reg = <0x07083000 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_R_APB2_RSB>; - clock-frequency = <3000000>; - resets = <&r_ccu RST_R_APB2_RSB>; - pinctrl-names = "default"; - pinctrl-0 = <&r_rsb_pins>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - ths: thermal-sensor@5070400 { - compatible = "allwinner,sun50i-h6-ths"; - reg = <0x05070400 0x100>; - interrupts = ; - clocks = <&ccu CLK_BUS_THS>; - clock-names = "bus"; - resets = <&ccu RST_BUS_THS>; - nvmem-cells = <&ths_calibration>; - nvmem-cell-names = "calibration"; - #thermal-sensor-cells = <1>; - }; - - sunxi-info { - compatible = "allwinner,sun50i-h6-sys-info"; - status = "okay"; - }; - - addr_mgt: addr-mgt { - compatible = "allwinner,sunxi-addr_mgt"; - type_addr_wifi = <0x2>; - type_addr_bt = <0x2>; - type_addr_eth = <0x2>; - status = "okay"; - }; - - dump_reg: dump_reg@20000 { - compatible = "allwinner,sunxi-dump-reg"; - reg = <0x0 0x03001000 0x0 0x0f20>; - status = "okay"; - }; - }; - - thermal-zones { - cpu-thermal { - polling-delay-passive = <250>; - polling-delay = <1000>; - thermal-sensors = <&ths 0>; - - trips { - cpu_warm: cpu_warm { - temperature = <75000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_hot_pre: cpu_hot_pre { - temperature = <80000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_hot: cpu_hot { - temperature = <85000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_very_hot_pre: cpu_very_hot_pre { - temperature = <90000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_very_hot: cpu_very_hot { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - cpu_crit: cpu_crit { - temperature = <105000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - cpu_warm_limit_cpu { - trip = <&cpu_warm>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>; - }; - - cpu_hot_pre_limit_cpu { - trip = <&cpu_hot_pre>; - cooling-device = <&cpu0 2 3>; - }; - - cpu_hot_limit_cpu { - trip = <&cpu_hot>; - cooling-device = <&cpu0 3 4>; - }; - - cpu_very_hot_pre_limit_cpu { - trip = <&cpu_very_hot_pre>; - cooling-device = <&cpu0 5 6>; - }; - - cpu_very_hot_limit_cpu { - trip = <&cpu_very_hot>; - cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>; - }; - }; - }; - - gpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <2000>; - thermal-sensors = <&ths 1>; - - trips { - gpu_alert0: gpu-alert-0 { - temperature = <95000>; - hysteresis = <2000>; - type = "passive"; - }; - - gpu_alert1: gpu-alert-1 { - temperature = <100000>; - hysteresis = <2000>; - type = "passive"; - }; - - gpu_alert2: gpu-alert-2 { - temperature = <105000>; - hysteresis = <2000>; - type = "passive"; - }; - - gpu-crit { - temperature = <115000>; - hysteresis = <0>; - type = "critical"; - }; - }; - - cooling-maps { - // Forbid the GPU to go over 756MHz - map0 { - trip = <&gpu_alert0>; - cooling-device = <&gpu 1 THERMAL_NO_LIMIT>; - }; - - // Forbid the GPU to go over 624MHz - map1 { - trip = <&gpu_alert1>; - cooling-device = <&gpu 2 THERMAL_NO_LIMIT>; - }; - - // Forbid the GPU to go over 576MHz - map2 { - trip = <&gpu_alert2>; - cooling-device = <&gpu 3 THERMAL_NO_LIMIT>; - }; - }; - }; - }; -};