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588bd7cdd3
Found information about them by vising commits to Mesa.git here: https://github.com/asheplyakov/panfrost-baikalm-howto + viewe git log v5.4.10..45..[alt's tag] of kernel
45 lines
1.6 KiB
Diff
45 lines
1.6 KiB
Diff
From 7349284a3d505346b1e2913e5b04efbe9b9b32c8 Mon Sep 17 00:00:00 2001
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From: "Vadim V. Vlasov" <vvv19xx@gmail.com>
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Date: Fri, 16 Oct 2020 17:14:00 +0300
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Subject: [PATCH] Serial: 82550_dw: Fix clock rate setting in
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dw8250_set_termios()
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If clk_round_rate() returns rate out of 1/16 precision range from
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the desired rate, then do not change clock rate.
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This usually happens if the desired rate is below the minimum
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supported by the clk.
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Fixes UART console on BE-M1000 SoC (without this patch the console
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gets garbled after loading the driver)
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---
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drivers/tty/serial/8250/8250_dw.c | 7 +++++--
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1 file changed, 5 insertions(+), 2 deletions(-)
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diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
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index 9e204f9b799a..0c29137a6583 100644
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--- a/drivers/tty/serial/8250/8250_dw.c
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+++ b/drivers/tty/serial/8250/8250_dw.c
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@@ -329,14 +329,17 @@ dw8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
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static void dw8250_set_termios(struct uart_port *p, struct ktermios *termios,
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struct ktermios *old)
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{
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- unsigned long newrate = tty_termios_baud_rate(termios) * 16;
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+ unsigned long baud = tty_termios_baud_rate(termios);
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+ unsigned long newrate = baud * 16;
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struct dw8250_data *d = to_dw8250_data(p->private_data);
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long rate;
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int ret;
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clk_disable_unprepare(d->clk);
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rate = clk_round_rate(d->clk, newrate);
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- if (rate > 0) {
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+ if (rate > baud * 17 || rate < baud * 15) {
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+ ret = -EINVAL; /* cannot set rate with acceptable accuracy */
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+ } else if (rate > 0) {
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/*
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* Premilinary set the uartclk to the new clock rate so the
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* clock update event handler caused by the clk_set_rate()
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--
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2.31.1
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