From fae5d229663f0c0d2d0c89bb53c5b525412a483c Mon Sep 17 00:00:00 2001 From: alexander stefanov Date: Fri, 15 Nov 2024 12:55:24 +0300 Subject: [PATCH] add ok368c --- device/rockchip/ok3568c/config | 8 + .../patches/u-boot/ok3568c-uboot.patch | 721 ++++++++++++++++++ 2 files changed, 729 insertions(+) create mode 100644 device/rockchip/ok3568c/config create mode 100644 device/rockchip/ok3568c/patches/u-boot/ok3568c-uboot.patch diff --git a/device/rockchip/ok3568c/config b/device/rockchip/ok3568c/config new file mode 100644 index 0000000..155bf1f --- /dev/null +++ b/device/rockchip/ok3568c/config @@ -0,0 +1,8 @@ +ARCH="aarch64" +KERNEL="https://github.com/armbian/linux-rockchip.git#rk-6.1-rkr3" +KERNEL_CONFIG="rockchip_linux_defconfig" +UBOOT="https://github.com/radxa/u-boot.git" +UBOOT_VERSION="next-dev-v2024.03" +UBOOT_CONFIG="ok3568c-rk3568_defconfig" +DTB="rockchip/rk3568-ok3568c" +CMDLINE="earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 console=tty1 consoleblank=0 irqchip.gicv3_pseudo_nmi=0 switolb=1 coherent_pool=2M cgroup_enable=cpuset cgroup_memory=1 cgroup_enable=memory swapaccount=1" diff --git a/device/rockchip/ok3568c/patches/u-boot/ok3568c-uboot.patch b/device/rockchip/ok3568c/patches/u-boot/ok3568c-uboot.patch new file mode 100644 index 0000000..36f0cab --- /dev/null +++ b/device/rockchip/ok3568c/patches/u-boot/ok3568c-uboot.patch @@ -0,0 +1,721 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Fri, 25 Oct 2024 14:54:00 +0000 +Subject: Patching u-boot rk35xx files arch/arm/dts/OK3568-C.dts + configs/OK3568-rk3568_defconfig + +Signed-off-by: John Doe +--- + arch/arm/dts/OK3568-C.dts | 475 ++++++++++ + configs/OK3568-rk3568_defconfig | 220 +++++ + 2 files changed, 695 insertions(+) + +diff --git a/arch/arm/dts/OK3568-C.dts b/arch/arm/dts/OK3568-C.dts +new file mode 100644 +index 00000000000..21131dbba6b +--- /dev/null ++++ b/arch/arm/dts/OK3568-C.dts +@@ -0,0 +1,475 @@ ++/* ++ * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * (C) Copyright 2020 Rockchip Electronics Co., Ltd ++ */ ++ ++/dts-v1/; ++#include "rk3568.dtsi" ++#include "rk3568-u-boot.dtsi" ++#include ++ ++/ { ++ model = "OK3568-C"; ++ compatible = "forlinx,OK3568-C", "rockchip,rk3568"; ++ ++ dc_12v: dc-12v { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ led_sys: led-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "led_sys"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; // Turn on blue led ++ regulator-boot-on; ++ regulator-always-on; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc3v3_pcie: gpio-regulator { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_pcie"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ enable-active-high; ++ gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; ++ startup-delay-us = <5000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ u-boot,dm-spl; ++ status = "okay"; ++ ++ volumeup-key { ++ u-boot,dm-spl; ++ linux,code = ; ++ label = "volume up"; ++ press-threshold-microvolt = <9>; ++ }; ++ }; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ u-boot,dm-pre-reloc; ++}; ++ ++&gpio0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ u-boot,dm-pre-reloc; ++ clock-frequency = <100000>; ++ ++ vdd_cpu: tcs4525@1c { ++ u-boot,dm-pre-reloc; ++ compatible = "tcs,tcs452x"; ++ reg = <0x1c>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1390000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk809: pmic@20 { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ /* not save the PMIC_POWER_EN register in uboot */ ++ not-save-power-en = <1>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ u-boot,dm-pre-reloc; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ u-boot,dm-pre-reloc; ++ }; ++ }; ++ ++ regulators { ++ u-boot,dm-pre-reloc; ++ vdd_logic: DCDC_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&pcie30_phy_grf { ++ u-boot,dm-pre-reloc; ++}; ++ ++&pcie3x2 { ++ u-boot,dm-pre-reloc; ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&pcie30phy { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++&gpio3 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&pinctrl { ++ u-boot,dm-spl; ++ pmic { ++ u-boot,dm-pre-reloc; ++ pmic_int: pmic_int { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_1 &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_2 &pcfg_pull_none>; ++ }; ++ }; ++}; +diff --git a/configs/OK3568-rk3568_defconfig b/configs/OK3568-rk3568_defconfig +new file mode 100644 +index 00000000000..65ecbfcd904 +--- /dev/null ++++ b/configs/OK3568-rk3568_defconfig +@@ -0,0 +1,220 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x80000 ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" ++CONFIG_ROCKCHIP_RK3568=y ++CONFIG_ROCKCHIP_FIT_IMAGE=y ++CONFIG_ROCKCHIP_VENDOR_PARTITION=y ++CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_TARGET_EVB_RK3568=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_NAND_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="OK3568-C" ++CONFIG_SMBIOS_PRODUCT_NAME="" ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_HW_CRYPTO=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_SPL_FIT_HW_CRYPTO=y ++# CONFIG_SPL_SYS_DCACHE_OFF is not set ++CONFIG_BOOTDELAY=0 ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_ANDROID_BOOTLOADER=y ++# CONFIG_ANDROID_WRITE_KEYBOX is not set ++CONFIG_ANDROID_AVB=y ++# CONFIG_ANDROID_KEYMASTER_CA is not set ++CONFIG_ANDROID_BOOT_IMAGE_HASH=y ++CONFIG_SPL_BOARD_INIT=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SPL_SHA256_SUPPORT=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_SPL_MMC_WRITE=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_MTD_WRITE=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_SPL_AB=y ++CONFIG_FASTBOOT_BUF_ADDR=0xc00800 ++CONFIG_FASTBOOT_BUF_SIZE=0x04000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_CMD_BOOTZ=y ++# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set ++CONFIG_CMD_DTIMG=y ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_IMI is not set ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_LZMADEC is not set ++# CONFIG_CMD_UNZIP is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_CMD_GPT=y ++# CONFIG_CMD_LOADB is not set ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_BOOT_ANDROID=y ++CONFIG_CMD_BOOT_ROCKCHIP=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_NAND=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_ITEST is not set ++CONFIG_CMD_TFTPPUT=y ++CONFIG_CMD_TFTP_BOOTM=y ++CONFIG_CMD_TFTP_FLASH=y ++# CONFIG_CMD_MISC is not set ++# CONFIG_CMD_CHARGE_DISPLAY is not set ++CONFIG_CMD_MTD_BLK=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="" ++# CONFIG_NET_TFTP_VARS is not set ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_DM_CRYPTO=y ++CONFIG_SPL_DM_CRYPTO=y ++CONFIG_ROCKCHIP_CRYPTO_V2=y ++CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_ROCKCHIP_GPIO_V2=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEY=y ++CONFIG_RK8XX_PWRKEY=y ++CONFIG_ADC_KEY=y ++CONFIG_MISC=y ++CONFIG_SPL_MISC=y ++CONFIG_ROCKCHIP_OTP=y ++CONFIG_SPL_ROCKCHIP_SECURE_OTP_V1=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_MTD=y ++CONFIG_MTD_BLK=y ++CONFIG_MTD_DEVICE=y ++CONFIG_NAND=y ++CONFIG_NAND_ROCKCHIP_V9=y ++CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y ++CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000 ++CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000 ++CONFIG_MTD_SPI_NAND=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_DM_ETH=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_NVME=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_NANENG_EDP=y ++CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_FUEL_GAUGE=y ++CONFIG_POWER_FG_RK817=y ++CONFIG_IO_DOMAIN=y ++CONFIG_ROCKCHIP_IO_DOMAIN=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_FAN53555=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_DM_CHARGE_DISPLAY=y ++CONFIG_CHARGE_ANIMATION=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_ROCKCHIP_SDRAM_COMMON=y ++CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0 ++CONFIG_DM_RESET=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_RESET_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_BASE=0xFE660000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_XHCI_PCI=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GADGET=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Rockchip" ++CONFIG_USB_GADGET_VENDOR_NUM=0x2207 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x350a ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_DRM_ROCKCHIP=y ++CONFIG_DRM_ROCKCHIP_DW_HDMI=y ++CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y ++CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y ++CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y ++CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y ++CONFIG_DRM_ROCKCHIP_LVDS=y ++CONFIG_LCD=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_RSA=y ++CONFIG_SPL_RSA=y ++CONFIG_RSA_N_SIZE=0x200 ++CONFIG_RSA_E_SIZE=0x10 ++CONFIG_RSA_C_SIZE=0x20 ++CONFIG_SHA512=y ++CONFIG_LZ4=y ++CONFIG_SPL_GZIP=y ++CONFIG_ERRNO_STR=y ++CONFIG_AVB_LIBAVB=y ++CONFIG_AVB_LIBAVB_AB=y ++CONFIG_AVB_LIBAVB_ATX=y ++CONFIG_AVB_LIBAVB_USER=y ++CONFIG_RK_AVB_LIBAVB_USER=y ++CONFIG_OPTEE_CLIENT=y ++CONFIG_OPTEE_V2=y +-- +Created with Armbian build tools https://github.com/armbian/build