mirror of
https://abf.rosa.ru/djam/glibc33.git
synced 2025-02-23 17:52:56 +00:00
92 lines
3.3 KiB
Diff
92 lines
3.3 KiB
Diff
--- glibc-2.24/sysdeps/unix/sysv/linux/x86/elision-conf.c.0091~ 2016-08-02 04:01:36.000000000 +0200
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+++ glibc-2.24/sysdeps/unix/sysv/linux/x86/elision-conf.c 2016-08-17 17:04:53.815350950 +0200
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@@ -66,8 +66,11 @@ elision_init (int argc __attribute__ ((u
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#ifdef ENABLE_LOCK_ELISION
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__pthread_force_elision = __libc_enable_secure ? 0 : __elision_available;
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#endif
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- if (!HAS_CPU_FEATURE (RTM))
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+ if (!HAS_CPU_FEATURE (RTM)) {
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__elision_aconf.retry_try_xbegin = 0; /* Disable elision on rwlocks */
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+ __elision_available = 0;
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+ __pthread_force_elision = 0;
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+ }
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}
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#ifdef SHARED
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--- glibc-2.24/sysdeps/x86/cpu-features.c.0091~ 2016-08-02 04:01:36.000000000 +0200
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+++ glibc-2.24/sysdeps/x86/cpu-features.c 2016-08-17 17:10:06.401454187 +0200
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@@ -22,7 +22,7 @@
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static void
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get_common_indeces (struct cpu_features *cpu_features,
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unsigned int *family, unsigned int *model,
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- unsigned int *extended_model)
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+ unsigned int *extended_model, unsigned int *stepping)
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{
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if (family)
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{
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@@ -34,6 +34,7 @@ get_common_indeces (struct cpu_features
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*family = (eax >> 8) & 0x0f;
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*model = (eax >> 4) & 0x0f;
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*extended_model = (eax >> 12) & 0xf0;
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+ *stepping = eax & 0x0f;
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if (*family == 0x0f)
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{
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*family += (eax >> 20) & 0xff;
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@@ -97,6 +98,7 @@ init_cpu_features (struct cpu_features *
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unsigned int ebx, ecx, edx;
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unsigned int family = 0;
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unsigned int model = 0;
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+ unsigned int stepping = 0;
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enum cpu_features_kind kind;
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#if !HAS_CPUID
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@@ -116,7 +118,7 @@ init_cpu_features (struct cpu_features *
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kind = arch_kind_intel;
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- get_common_indeces (cpu_features, &family, &model, &extended_model);
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+ get_common_indeces (cpu_features, &family, &model, &extended_model, &stepping);
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if (family == 0x06)
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{
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@@ -213,7 +215,7 @@ init_cpu_features (struct cpu_features *
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kind = arch_kind_amd;
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- get_common_indeces (cpu_features, &family, &model, &extended_model);
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+ get_common_indeces (cpu_features, &family, &model, &extended_model, &stepping);
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ecx = cpu_features->cpuid[COMMON_CPUID_INDEX_1].ecx;
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@@ -250,7 +252,7 @@ init_cpu_features (struct cpu_features *
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else
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{
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kind = arch_kind_other;
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- get_common_indeces (cpu_features, NULL, NULL, NULL);
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+ get_common_indeces (cpu_features, NULL, NULL, NULL, NULL);
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}
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/* Support i586 if CX8 is available. */
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@@ -265,6 +267,12 @@ init_cpu_features (struct cpu_features *
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no_cpuid:
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#endif
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+ /* Disable Intel TSX (HLE and RTM) due to erratum HSD136/HSW136
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+ on Haswell processors */
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+ if (kind == arch_kind_intel && family == 6 &&
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+ ((model == 63 && stepping <= 2) || (model == 60 && stepping <= 3) ||
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+ (model == 69 && stepping <= 1) || (model == 70 && stepping <= 1)))
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+ cpu_features->cpuid[COMMON_CPUID_INDEX_7].ebx &= ~(bit_cpu_RTM | bit_cpu_HLE);
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cpu_features->family = family;
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cpu_features->model = model;
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cpu_features->kind = kind;
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--- glibc-2.24/sysdeps/x86/cpu-features.h.0091~ 2016-08-02 04:01:36.000000000 +0200
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+++ glibc-2.24/sysdeps/x86/cpu-features.h 2016-08-17 17:04:53.815350950 +0200
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@@ -57,6 +57,7 @@
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/* COMMON_CPUID_INDEX_7. */
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#define bit_cpu_ERMS (1 << 9)
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#define bit_cpu_RTM (1 << 11)
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+#define bit_cpu_HLE (1 << 4)
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#define bit_cpu_AVX2 (1 << 5)
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#define bit_cpu_AVX512F (1 << 16)
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#define bit_cpu_AVX512DQ (1 << 17)
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