--- glibc-2.24/sysdeps/unix/sysv/linux/x86/elision-conf.c.0091~	2016-08-02 04:01:36.000000000 +0200
+++ glibc-2.24/sysdeps/unix/sysv/linux/x86/elision-conf.c	2016-08-17 17:04:53.815350950 +0200
@@ -66,8 +66,11 @@ elision_init (int argc __attribute__ ((u
 #ifdef ENABLE_LOCK_ELISION
   __pthread_force_elision = __libc_enable_secure ? 0 : __elision_available;
 #endif
-  if (!HAS_CPU_FEATURE (RTM))
+  if (!HAS_CPU_FEATURE (RTM)) {
     __elision_aconf.retry_try_xbegin = 0; /* Disable elision on rwlocks */
+    __elision_available = 0;
+    __pthread_force_elision = 0;
+  }
 }
 
 #ifdef SHARED
--- glibc-2.24/sysdeps/x86/cpu-features.c.0091~	2016-08-02 04:01:36.000000000 +0200
+++ glibc-2.24/sysdeps/x86/cpu-features.c	2016-08-17 17:10:06.401454187 +0200
@@ -22,7 +22,7 @@
 static void
 get_common_indeces (struct cpu_features *cpu_features,
 		    unsigned int *family, unsigned int *model,
-		    unsigned int *extended_model)
+		    unsigned int *extended_model, unsigned int *stepping)
 {
   if (family)
     {
@@ -34,6 +34,7 @@ get_common_indeces (struct cpu_features
       *family = (eax >> 8) & 0x0f;
       *model = (eax >> 4) & 0x0f;
       *extended_model = (eax >> 12) & 0xf0;
+      *stepping = eax & 0x0f;
       if (*family == 0x0f)
 	{
 	  *family += (eax >> 20) & 0xff;
@@ -97,6 +98,7 @@ init_cpu_features (struct cpu_features *
   unsigned int ebx, ecx, edx;
   unsigned int family = 0;
   unsigned int model = 0;
+  unsigned int stepping = 0;
   enum cpu_features_kind kind;
 
 #if !HAS_CPUID
@@ -116,7 +118,7 @@ init_cpu_features (struct cpu_features *
 
       kind = arch_kind_intel;
 
-      get_common_indeces (cpu_features, &family, &model, &extended_model);
+      get_common_indeces (cpu_features, &family, &model, &extended_model, &stepping);
 
       if (family == 0x06)
 	{
@@ -213,7 +215,7 @@ init_cpu_features (struct cpu_features *
 
       kind = arch_kind_amd;
 
-      get_common_indeces (cpu_features, &family, &model, &extended_model);
+      get_common_indeces (cpu_features, &family, &model, &extended_model, &stepping);
 
       ecx = cpu_features->cpuid[COMMON_CPUID_INDEX_1].ecx;
 
@@ -250,7 +252,7 @@ init_cpu_features (struct cpu_features *
   else
     {
       kind = arch_kind_other;
-      get_common_indeces (cpu_features, NULL, NULL, NULL);
+      get_common_indeces (cpu_features, NULL, NULL, NULL, NULL);
     }
 
   /* Support i586 if CX8 is available.  */
@@ -265,6 +267,12 @@ init_cpu_features (struct cpu_features *
 no_cpuid:
 #endif
 
+  /* Disable Intel TSX (HLE and RTM) due to erratum HSD136/HSW136
+     on Haswell processors */
+  if (kind == arch_kind_intel && family == 6 &&
+      ((model == 63 && stepping <= 2) || (model == 60 && stepping <= 3) ||
+       (model == 69 && stepping <= 1) || (model == 70 && stepping <= 1)))
+    cpu_features->cpuid[COMMON_CPUID_INDEX_7].ebx &= ~(bit_cpu_RTM | bit_cpu_HLE);
   cpu_features->family = family;
   cpu_features->model = model;
   cpu_features->kind = kind;
--- glibc-2.24/sysdeps/x86/cpu-features.h.0091~	2016-08-02 04:01:36.000000000 +0200
+++ glibc-2.24/sysdeps/x86/cpu-features.h	2016-08-17 17:04:53.815350950 +0200
@@ -57,6 +57,7 @@
 /* COMMON_CPUID_INDEX_7.  */
 #define bit_cpu_ERMS		(1 << 9)
 #define bit_cpu_RTM		(1 << 11)
+#define bit_cpu_HLE		(1 << 4)
 #define bit_cpu_AVX2		(1 << 5)
 #define bit_cpu_AVX512F		(1 << 16)
 #define bit_cpu_AVX512DQ	(1 << 17)