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8aaa8634a3
The MT bit in MPIDR is always set for SGI platforms and so the core position calculation code is updated to take into account the thread affinity value as well. Change-Id: I7b2a52707f607dc3859c6bbcd2b145b7987cb4ed Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Signed-off-by: Vishwanatha HG <vishwanatha.hg@arm.com>
41 lines
1.3 KiB
C
41 lines
1.3 KiB
C
/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat_arm.h>
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#include <platform.h>
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#include <assert.h>
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#if ARM_PLAT_MT
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#pragma weak plat_arm_get_cpu_pe_count
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#endif
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/******************************************************************************
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* This function implements a part of the critical interface between the psci
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* generic layer and the platform that allows the former to query the platform
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* to convert an MPIDR to a unique linear index. An error code (-1) is
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* returned in case the MPIDR is invalid.
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*****************************************************************************/
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int plat_core_pos_by_mpidr(u_register_t mpidr)
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{
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if (arm_check_mpidr(mpidr) == 0) {
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#if ARM_PLAT_MT
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assert((read_mpidr_el1() & MPIDR_MT_MASK) != 0);
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#endif
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return plat_arm_calc_core_pos(mpidr);
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}
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return -1;
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}
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#if ARM_PLAT_MT
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/******************************************************************************
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* This function returns the PE count within the physical cpu corresponding to
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* `mpidr`. Now one cpu only have one thread, so just return 1.
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*****************************************************************************/
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unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr)
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{
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return 1;
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}
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#endif /* ARM_PLAT_MT */
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