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https://github.com/ARM-software/arm-trusted-firmware.git
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ef8b05f559
Existing boot source is hardcoded in socfpga_plat_def.h. To change boot source, user need to update code. Thus adding this will remove the code update needed when need to change boot source. Also, it will have ARM_LINUX_KERNEL_AS_BL33 flag for each platform in platform.mk. This will be easily to control based on platform build. Change-Id: I383beb8cbca5ec0f247221ad42796554adc3daae Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
68 lines
1.6 KiB
C
68 lines
1.6 KiB
C
/*
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* Copyright (c) 2019-2023, Intel Corporation. All rights reserved.
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* Copyright (c) 2024, Altera Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef SOCFPGA_PRIVATE_H
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#define SOCFPGA_PRIVATE_H
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#define EMMC_DESC_SIZE (1<<20)
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#define EMMC_INIT_PARAMS(base, clk) \
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{ .bus_width = MMC_BUS_WIDTH_4, \
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.clk_rate = (clk), \
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.desc_base = (base), \
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.desc_size = EMMC_DESC_SIZE, \
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.flags = 0, \
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.reg_base = SOCFPGA_MMC_REG_BASE \
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}
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typedef enum {
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BOOT_SOURCE_FPGA = 0,
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BOOT_SOURCE_SDMMC,
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BOOT_SOURCE_NAND,
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BOOT_SOURCE_QSPI,
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BOOT_SOURCE_RSVD
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} boot_source_type;
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/*******************************************************************************
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* Function and variable prototypes
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******************************************************************************/
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void enable_nonsecure_access(void);
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void socfpga_io_setup(int boot_source, unsigned long offset);
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void socfgpa_configure_mmu_el3(unsigned long total_base,
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unsigned long total_size,
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unsigned long ro_start,
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unsigned long ro_limit,
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unsigned long coh_start,
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unsigned long coh_limit);
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void socfpga_configure_mmu_el1(unsigned long total_base,
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unsigned long total_size,
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unsigned long ro_start,
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unsigned long ro_limit,
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unsigned long coh_start,
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unsigned long coh_limit);
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void socfpga_delay_timer_init(void);
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void socfpga_gic_driver_init(void);
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void socfpga_delay_timer_init_args(void);
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uint32_t socfpga_get_spsr_for_bl32_entry(void);
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uint32_t socfpga_get_spsr_for_bl33_entry(void);
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unsigned long socfpga_get_ns_image_entrypoint(void);
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void plat_secondary_cpus_bl31_entry(void);
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#endif /* SOCFPGA_PRIVATE_H */
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