mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-16 17:44:19 +00:00
fcb80d7d14
* changes: fix(cpus): clear CPUPWRCTLR_EL1.CORE_PWRDN_EN_BIT on reset chore(docs): drop the "wfi" from `pwr_domain_pwr_down_wfi` chore(psci): drop skip_wfi variable feat(arm): convert arm platforms to expect a wakeup fix(cpus): avoid SME related loss of context on powerdown feat(psci): allow cores to wake up from powerdown refactor: panic after calling psci_power_down_wfi() refactor(cpus): undo errata mitigations feat(cpus): add sysreg_bit_toggle
317 lines
9.1 KiB
Makefile
317 lines
9.1 KiB
Makefile
# Copyright (c) 2021-2025, Arm Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include common/fdt_wrappers.mk
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TARGET_FLAVOUR := fvp
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# DPU with SCMI may not necessarily work, so allow its independence
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TC_DPU_USE_SCMI_CLK := 1
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# SCMI power domain control enable
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TC_SCMI_PD_CTRL_EN := 1
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# System setup
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CSS_USE_SCMI_SDS_DRIVER := 1
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HW_ASSISTED_COHERENCY := 1
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USE_COHERENT_MEM := 0
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GIC_ENABLE_V4_EXTN := 1
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GICV3_SUPPORT_GIC600 := 1
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override NEED_BL2U := no
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override ARM_PLAT_MT := 1
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# CPU setup
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ARM_ARCH_MINOR := 7
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BRANCH_PROTECTION := 1
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ENABLE_FEAT_MPAM := 1 # default is 2, optimise
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ENABLE_SVE_FOR_NS := 2 # to show we use it
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ENABLE_SVE_FOR_SWD := 1
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ENABLE_SME_FOR_NS := 2
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ENABLE_SME2_FOR_NS := 2
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ENABLE_SME_FOR_SWD := 1
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ENABLE_TRBE_FOR_NS := 1
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ENABLE_SYS_REG_TRACE_FOR_NS := 1
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ENABLE_FEAT_AMU := 1
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ENABLE_AMU_FCONF := 1
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ENABLE_AMU_AUXILIARY_COUNTERS := 1
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ENABLE_MPMM := 1
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ENABLE_MPMM_FCONF := 1
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ENABLE_FEAT_MTE2 := 2
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ENABLE_SPE_FOR_NS := 3
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ENABLE_FEAT_TCR2 := 3
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ifneq ($(filter ${TARGET_PLATFORM}, 3),)
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ENABLE_FEAT_RNG_TRAP := 0
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else
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ENABLE_FEAT_RNG_TRAP := 1
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endif
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CTX_INCLUDE_AARCH32_REGS := 0
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ifeq (${SPD},spmd)
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SPMD_SPM_AT_SEL2 := 1
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CTX_INCLUDE_PAUTH_REGS := 1
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endif
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TRNG_SUPPORT := 1
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# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP)
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TC_RESOLUTION_OPTIONS := 640x480p60 \
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1920x1080p60
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# Set default to the 640x480p60 resolution mode
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TC_RESOLUTION ?= $(firstword $(TC_RESOLUTION_OPTIONS))
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# Check resolution option for FVP
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ifneq ($(filter ${TARGET_FLAVOUR}, fvp),)
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ifeq ($(filter ${TC_RESOLUTION}, ${TC_RESOLUTION_OPTIONS}),)
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$(error TC_RESOLUTION is ${TC_RESOLUTION}, it must be: ${TC_RESOLUTION_OPTIONS})
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endif
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endif
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ifneq ($(shell expr $(TARGET_PLATFORM) \<= 1), 0)
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$(error Platform ${PLAT}$(TARGET_PLATFORM) is no longer available.)
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endif
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ifneq ($(shell expr $(TARGET_PLATFORM) = 2), 0)
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$(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
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Some of the features might not work as expected)
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endif
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ifeq ($(shell expr $(TARGET_PLATFORM) \<= 4), 0)
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$(error TARGET_PLATFORM must be less than or equal to 4)
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endif
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ifeq ($(filter ${TARGET_FLAVOUR}, fvp fpga),)
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$(error TARGET_FLAVOUR must be fvp or fpga)
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endif
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# Support for loading FS Image to DRAM
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TC_FPGA_FS_IMG_IN_RAM := 0
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# Support Loading of FIP image to DRAM
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TC_FPGA_FIP_IMG_IN_RAM := 0
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# Use simple panel instead of vencoder with DPU
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TC_DPU_USE_SIMPLE_PANEL := 0
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$(eval $(call add_defines, \
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TARGET_PLATFORM \
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TARGET_FLAVOUR_$(call uppercase,${TARGET_FLAVOUR}) \
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TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \
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TC_DPU_USE_SCMI_CLK \
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TC_SCMI_PD_CTRL_EN \
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TC_FPGA_FS_IMG_IN_RAM \
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TC_FPGA_FIP_IMG_IN_RAM \
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TC_DPU_USE_SIMPLE_PANEL \
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))
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CSS_LOAD_SCP_IMAGES := 1
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# Save DSU PMU registers on cluster off and restore them on cluster on
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PRESERVE_DSU_PMU_REGS := 1
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# Specify MHU type based on platform
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ifneq ($(filter ${TARGET_PLATFORM}, 2),)
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PLAT_MHU_VERSION := 2
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else
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PLAT_MHU_VERSION := 3
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endif
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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ENT_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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plat/arm/common/arm_gicv3.c
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TC_BASE = plat/arm/board/tc
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PLAT_INCLUDES += -I${TC_BASE}/include/ \
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-I${TC_BASE}/fdts/
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# CPU libraries for TARGET_PLATFORM=1
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ifeq (${TARGET_PLATFORM}, 1)
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TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
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lib/cpus/aarch64/cortex_a715.S \
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lib/cpus/aarch64/cortex_x3.S
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endif
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# CPU libraries for TARGET_PLATFORM=2
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ifeq (${TARGET_PLATFORM}, 2)
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ERRATA_A520_2938996 := 1
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ERRATA_X4_2726228 := 1
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TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
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lib/cpus/aarch64/cortex_a720.S \
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lib/cpus/aarch64/cortex_x4.S
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endif
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# CPU libraries for TARGET_PLATFORM=3
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ifeq (${TARGET_PLATFORM}, 3)
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ERRATA_A520_2938996 := 1
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TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a520.S \
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lib/cpus/aarch64/cortex_a725.S \
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lib/cpus/aarch64/cortex_x925.S
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endif
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# CPU libraries for TARGET_PLATFORM=4
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ifeq (${TARGET_PLATFORM}, 4)
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FEAT_PABANDON := 1
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# prevent CME related wakups
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ERRATA_SME_POWER_DOWN := 1
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TC_CPU_SOURCES += lib/cpus/aarch64/cortex_gelas.S \
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lib/cpus/aarch64/nevis.S \
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lib/cpus/aarch64/travis.S
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endif
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INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c \
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plat/arm/common/arm_ni.c
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PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
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${TC_BASE}/include/tc_helpers.S
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ifneq (${ENABLE_STACK_PROTECTOR},0)
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PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_stack_protector.c
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endif
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BL1_SOURCES += ${INTERCONNECT_SOURCES} \
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${TC_CPU_SOURCES} \
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${TC_BASE}/tc_trusted_boot.c \
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${TC_BASE}/tc_bl1_setup.c \
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${TC_BASE}/tc_err.c \
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drivers/arm/sbsa/sbsa.c
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BL2_SOURCES += ${TC_BASE}/tc_security.c \
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${TC_BASE}/tc_err.c \
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${TC_BASE}/tc_trusted_boot.c \
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${TC_BASE}/tc_bl2_setup.c \
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lib/utils/mem_region.c \
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drivers/arm/tzc/tzc400.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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ifeq ($(shell test $(TARGET_PLATFORM) -le 2; echo $$?),0)
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BL2_SOURCES += plat/arm/common/arm_tzc400.c
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endif
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BL31_SOURCES += ${INTERCONNECT_SOURCES} \
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${TC_CPU_SOURCES} \
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${ENT_GIC_SOURCES} \
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${TC_BASE}/tc_bl31_setup.c \
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${TC_BASE}/tc_topology.c \
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lib/fconf/fconf.c \
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lib/fconf/fconf_dyn_cfg_getter.c \
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drivers/arm/css/dsu/dsu.c \
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drivers/cfi/v2m/v2m_flash.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c \
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drivers/arm/sbsa/sbsa.c
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BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
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# Add the FDT_SOURCES and options for Dynamic Config
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FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
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${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts \
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${TC_BASE}/fdts/${PLAT}_nt_fw_config.dts
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FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
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FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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# Add the FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG}))
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ifeq (${SPD},spmd)
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ifeq ($(ARM_SPMC_MANIFEST_DTS),)
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ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_test_manifest.dts
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endif
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FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
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TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
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# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
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endif
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#Device tree
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TC_HW_CONFIG_DTS := fdts/${PLAT}${TARGET_PLATFORM}.dts
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TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
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FDT_SOURCES += ${TC_HW_CONFIG_DTS}
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$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
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# Add the HW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
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$(info Including rse_comms.mk)
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include drivers/arm/rse/rse_comms.mk
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BL1_SOURCES += ${RSE_COMMS_SOURCES}
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BL2_SOURCES += ${RSE_COMMS_SOURCES}
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BL31_SOURCES += ${RSE_COMMS_SOURCES} \
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lib/psa/rse_platform.c
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# Include Measured Boot makefile before any Crypto library makefile.
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# Crypto library makefile may need default definitions of Measured Boot build
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# flags present in Measured Boot makefile.
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ifeq (${MEASURED_BOOT},1)
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ifeq (${DICE_PROTECTION_ENVIRONMENT},1)
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$(info Including qcbor.mk)
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include drivers/measured_boot/rse/qcbor.mk
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$(info Including dice_prot_env.mk)
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include drivers/measured_boot/rse/dice_prot_env.mk
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BL1_SOURCES += ${QCBOR_SOURCES} \
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${DPE_SOURCES} \
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plat/arm/board/tc/tc_common_dpe.c \
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plat/arm/board/tc/tc_bl1_dpe.c \
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lib/psa/dice_protection_environment.c \
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drivers/arm/css/sds/sds.c \
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drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c
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BL2_SOURCES += ${QCBOR_SOURCES} \
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${DPE_SOURCES} \
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plat/arm/board/tc/tc_common_dpe.c \
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plat/arm/board/tc/tc_bl2_dpe.c \
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lib/psa/dice_protection_environment.c
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PLAT_INCLUDES += -I${QCBOR_INCLUDES} \
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-Iinclude/lib/dice
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else
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$(info Including rse_measured_boot.mk)
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include drivers/measured_boot/rse/rse_measured_boot.mk
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BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \
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plat/arm/board/tc/tc_common_measured_boot.c \
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plat/arm/board/tc/tc_bl1_measured_boot.c \
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lib/psa/measured_boot.c
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BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \
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plat/arm/board/tc/tc_common_measured_boot.c \
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plat/arm/board/tc/tc_bl2_measured_boot.c \
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lib/psa/measured_boot.c
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endif
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endif
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BL31_SOURCES += plat/arm/board/tc/tc_trng.c
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ifneq (${ENABLE_FEAT_RNG_TRAP},0)
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BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c
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endif
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ifneq (${PLATFORM_TEST},)
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# Add this include as first, before arm_common.mk. This is necessary
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# because arm_common.mk builds Mbed TLS, and platform_test.mk can
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# change the list of Mbed TLS files that are to be compiled
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# (LIBMBEDTLS_SRCS).
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include plat/arm/board/tc/platform_test.mk
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endif
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include plat/arm/common/arm_common.mk
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include plat/arm/css/common/css_common.mk
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include plat/arm/board/common/board_common.mk
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