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https://github.com/ARM-software/arm-trusted-firmware.git
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fc8d2d3980
At the moment we only support FEAT_TRF to be either unconditionally compiled in, or to be not supported at all. Add support for runtime detection (ENABLE_TRF_FOR_NS=2), by splitting is_feat_trf_present() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we access TRF related registers. Also move the context saving code from assembly to C, and use the new is_feat_trf_supported() function to guard its execution. The FVP platform decided to compile in support unconditionally (=1), even though FEAT_TRF is an ARMv8.4 feature, so is not available with the FVP model's default command line. Change that to the now supported dynamic option (=2), so the right decision can be made by the code at runtime. Change-Id: Ia97b01adbe24970a4d837afd463dc5506b7295a3 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
342 lines
10 KiB
C
342 lines
10 KiB
C
/*
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* Copyright (c) 2019-2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ARCH_FEATURES_H
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#define ARCH_FEATURES_H
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#include <stdbool.h>
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#include <arch_helpers.h>
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#include <common/feat_detect.h>
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#define ISOLATE_FIELD(reg, feat) \
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((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK)))
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static inline bool is_armv7_gentimer_present(void)
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{
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/* The Generic Timer is always present in an ARMv8-A implementation */
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return true;
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}
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static inline bool is_armv8_1_pan_present(void)
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{
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return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_PAN_SHIFT) &
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ID_AA64MMFR1_EL1_PAN_MASK) != 0U;
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}
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static inline bool is_armv8_1_vhe_present(void)
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{
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return ((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_VHE_SHIFT) &
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ID_AA64MMFR1_EL1_VHE_MASK) != 0U;
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}
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static inline bool is_armv8_2_ttcnp_present(void)
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{
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return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
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ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
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}
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static inline bool is_feat_pacqarma3_present(void)
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{
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uint64_t mask_id_aa64isar2 =
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(ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
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(ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT);
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/* If any of the fields is not zero, QARMA3 algorithm is present */
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return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U;
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}
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static inline bool is_armv8_3_pauth_present(void)
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{
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uint64_t mask_id_aa64isar1 =
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(ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
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(ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
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(ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
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(ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
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/*
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* If any of the fields is not zero or QARMA3 is present,
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* PAuth is present
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*/
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return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
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is_feat_pacqarma3_present());
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}
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static inline bool is_armv8_4_dit_present(void)
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{
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return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
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ID_AA64PFR0_DIT_MASK) == 1U;
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}
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static inline bool is_armv8_4_ttst_present(void)
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{
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return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
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ID_AA64MMFR2_EL1_ST_MASK) == 1U;
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}
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static inline bool is_armv8_5_bti_present(void)
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{
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return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
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ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
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}
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static inline unsigned int get_armv8_5_mte_support(void)
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{
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return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
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ID_AA64PFR1_EL1_MTE_MASK);
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}
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static inline bool is_armv8_4_sel2_present(void)
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{
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return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SEL2_SHIFT) &
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ID_AA64PFR0_SEL2_MASK) == 1ULL;
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}
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static inline bool is_armv8_6_twed_present(void)
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{
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return (((read_id_aa64mmfr1_el1() >> ID_AA64MMFR1_EL1_TWED_SHIFT) &
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ID_AA64MMFR1_EL1_TWED_MASK) == ID_AA64MMFR1_EL1_TWED_SUPPORTED);
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}
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static unsigned int read_feat_fgt_id_field(void)
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{
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return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT);
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}
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static inline bool is_feat_fgt_supported(void)
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{
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if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) {
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return false;
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}
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if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) {
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return true;
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}
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return read_feat_fgt_id_field() != 0U;
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}
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static inline unsigned long int get_armv8_6_ecv_support(void)
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{
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return ((read_id_aa64mmfr0_el1() >> ID_AA64MMFR0_EL1_ECV_SHIFT) &
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ID_AA64MMFR0_EL1_ECV_MASK);
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}
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static inline bool is_armv8_5_rng_present(void)
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{
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return ((read_id_aa64isar0_el1() >> ID_AA64ISAR0_RNDR_SHIFT) &
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ID_AA64ISAR0_RNDR_MASK);
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}
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/*******************************************************************************
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* Functions to identify the presence of the Activity Monitors Extension
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******************************************************************************/
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static unsigned int read_feat_amu_id_field(void)
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{
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return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU);
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}
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static inline bool is_feat_amu_supported(void)
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{
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if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) {
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return false;
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}
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if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) {
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return true;
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}
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return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1;
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}
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static inline bool is_armv8_6_feat_amuv1p1_present(void)
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{
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return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1;
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}
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/*
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* Return MPAM version:
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*
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* 0x00: None Armv8.0 or later
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* 0x01: v0.1 Armv8.4 or later
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* 0x10: v1.0 Armv8.2 or later
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* 0x11: v1.1 Armv8.4 or later
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*
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*/
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static inline unsigned int get_mpam_version(void)
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{
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return (unsigned int)((((read_id_aa64pfr0_el1() >>
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ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
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((read_id_aa64pfr1_el1() >>
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ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
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}
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static inline unsigned int read_feat_hcx_id_field(void)
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{
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return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX);
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}
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static inline bool is_feat_hcx_supported(void)
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{
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if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) {
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return false;
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}
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if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) {
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return true;
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}
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return read_feat_hcx_id_field() != 0U;
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}
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static inline bool is_feat_rng_trap_present(void)
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{
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return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) &
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ID_AA64PFR1_EL1_RNDR_TRAP_MASK)
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== ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
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}
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static inline unsigned int get_armv9_2_feat_rme_support(void)
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{
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/*
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* Return the RME version, zero if not supported. This function can be
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* used as both an integer value for the RME version or compared to zero
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* to detect RME presence.
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*/
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return (unsigned int)(read_id_aa64pfr0_el1() >>
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ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
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}
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/*********************************************************************************
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* Function to identify the presence of FEAT_SB (Speculation Barrier Instruction)
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********************************************************************************/
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static inline bool is_armv8_0_feat_sb_present(void)
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{
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return (((read_id_aa64isar1_el1() >> ID_AA64ISAR1_SB_SHIFT) &
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ID_AA64ISAR1_SB_MASK) == ID_AA64ISAR1_SB_SUPPORTED);
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}
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/*********************************************************************************
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* Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2)
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********************************************************************************/
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static inline bool is_armv8_0_feat_csv2_2_present(void)
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{
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return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_CSV2_SHIFT) &
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ID_AA64PFR0_CSV2_MASK) == ID_AA64PFR0_CSV2_2_SUPPORTED);
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}
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/**********************************************************************************
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* Function to identify the presence of FEAT_SPE (Statistical Profiling Extension)
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*********************************************************************************/
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static inline bool is_armv8_2_feat_spe_present(void)
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{
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return (((read_id_aa64dfr0_el1() >> ID_AA64DFR0_PMS_SHIFT) &
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ID_AA64DFR0_PMS_MASK) != ID_AA64DFR0_SPE_NOT_SUPPORTED);
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}
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/*******************************************************************************
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* Function to identify the presence of FEAT_SVE (Scalable Vector Extension)
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******************************************************************************/
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static inline bool is_armv8_2_feat_sve_present(void)
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{
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return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) &
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ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED);
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}
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/*******************************************************************************
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* Function to identify the presence of FEAT_RAS (Reliability,Availability,
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* and Serviceability Extension)
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******************************************************************************/
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static inline bool is_armv8_2_feat_ras_present(void)
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{
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return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) &
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ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
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}
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/**************************************************************************
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* Function to identify the presence of FEAT_DIT (Data Independent Timing)
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*************************************************************************/
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static inline bool is_armv8_4_feat_dit_present(void)
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{
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return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
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ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED);
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}
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/*************************************************************************
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* Function to identify the presence of FEAT_TRF (TraceLift)
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************************************************************************/
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static inline unsigned int read_feat_trf_id_field(void)
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{
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return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT);
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}
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static inline bool is_feat_trf_supported(void)
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{
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if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) {
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return false;
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}
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if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) {
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return true;
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}
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return read_feat_trf_id_field() != 0U;
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}
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/********************************************************************************
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* Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization
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* Support)
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*******************************************************************************/
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static inline unsigned int get_armv8_4_feat_nv_support(void)
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{
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return (((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_NV_SHIFT) &
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ID_AA64MMFR2_EL1_NV_MASK));
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}
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/*******************************************************************************
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* Function to identify the presence of FEAT_BRBE (Branch Record Buffer
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* Extension)
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******************************************************************************/
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static inline unsigned int read_feat_brbe_id_field(void)
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{
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return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE);
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}
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static inline bool is_feat_brbe_supported(void)
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{
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if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) {
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return false;
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}
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if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) {
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return true;
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}
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return read_feat_brbe_id_field() != 0U;
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}
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/*******************************************************************************
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* Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
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******************************************************************************/
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static inline unsigned int read_feat_trbe_id_field(void)
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{
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return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER);
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}
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static inline bool is_feat_trbe_supported(void)
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{
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if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) {
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return false;
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}
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if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) {
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return true;
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}
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return read_feat_trbe_id_field() != 0U;
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}
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#endif /* ARCH_FEATURES_H */
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