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b525a8f0d2
Flexspi driver now introduces read/write/erase APIs for complete flash size, FAST-READ are by default used and IP bus is used for erase, read and write using flexspi APIs. Framework layer is currently embedded in driver itself using flash_info defines. Test cases are also added to confirm flash functionality currently under DEBUG flag. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Change-Id: I755c0f763f6297a35cad6885f84640de50f51bb0
25 lines
560 B
C
25 lines
560 B
C
/*
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* Copyright 2020 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#include <assert.h>
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#include <fspi_api.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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int flexspi_nor_io_setup(uintptr_t nxp_flexspi_flash_addr,
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size_t nxp_flexspi_flash_size, uint32_t fspi_base_reg_addr)
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{
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int ret = 0;
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ret = fspi_init(fspi_base_reg_addr, nxp_flexspi_flash_addr);
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/* Adding NOR Memory Map in XLAT Table */
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mmap_add_region(nxp_flexspi_flash_addr, nxp_flexspi_flash_addr,
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nxp_flexspi_flash_size, MT_MEMORY | MT_RW);
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return ret;
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}
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