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f99a69c386
Adds driver support to preserve DSU PMU register values over a DSU power cycle. This driver needs to be enabled by the platforms that support DSU and also need it's PMU registers to be preserved Change-Id: I7fc68a3d7d99ee369379aa5cd114fffc763fc0d2 Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
42 lines
991 B
C
42 lines
991 B
C
/*
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* Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef DSU_H
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#define DSU_H
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#define PMCR_N_MAX 0x1f
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#define save_pmu_reg(state, reg) state->reg = read_##reg()
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#define restore_pmu_reg(context, reg) write_##reg(context->reg)
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typedef struct cluster_pmu_state{
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uint64_t clusterpmcr;
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uint64_t clusterpmcntenset;
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uint64_t clusterpmccntr;
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uint64_t clusterpmovsset;
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uint64_t clusterpmselr;
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uint64_t clusterpmsevtyper;
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uint64_t counter_val[PMCR_N_MAX];
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uint64_t counter_type[PMCR_N_MAX];
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} cluster_pmu_state_t;
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static inline unsigned int read_cluster_eventctr_num(void)
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{
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return ((read_clusterpmcr() >> CLUSTERPMCR_N_SHIFT) &
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CLUSTERPMCR_N_MASK);
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}
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void save_dsu_pmu_state(cluster_pmu_state_t *cluster_pmu_context);
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void restore_dsu_pmu_state(cluster_pmu_state_t *cluster_pmu_context);
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void cluster_on_dsu_pmu_context_restore(void);
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void cluster_off_dsu_pmu_context_save(void);
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#endif /* DSU_H */
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