arm-trusted-firmware/bl31
Jayanth Dodderi Chidanand f8a35797b9 fix(smccc): check smc_fid [23:17] bits
As per SMCCC spec Table 2.1 bit 23:17 must be zero (MBZ),
for all Fast Calls, when bit[31] == 1.
Adding this check to ensure SMC FIDs when get to the SMC handler
have these bits (23:17) cleared, if not capture and report them
as an unknown SMCs at the core.

Also the C runtime stack is copied to the stackpointer well in
advance, to leverage the existing el3_exit routine for unknown SMC.

Change-Id: I9972216db5ac164815011177945fb34dadc871b0
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
2023-03-20 10:12:38 +00:00
..
aarch64 fix(smccc): check smc_fid [23:17] bits 2023-03-20 10:12:38 +00:00
bl31.ld.S build: always prefix section names with . 2023-02-20 18:29:33 +00:00
bl31.mk refactor(trf): enable FEAT_TRF for FEAT_STATE_CHECKED 2023-02-27 18:04:14 +00:00
bl31_context_mgmt.c feat(rme): add context management changes for FEAT_RME 2021-10-05 18:41:35 +02:00
bl31_main.c refactor(context-mgmt): move FEAT_HCX save/restore into C 2023-01-11 16:02:58 +00:00
bl31_traps.c feat(fvp): emulate trapped RNDR 2022-12-21 12:59:36 +00:00
ehf.c fix(bl31): allow use of EHF with S-EL2 SPMC 2022-08-30 08:29:25 -07:00
interrupt_mgmt.c Use correct type when reading SCR register 2020-01-28 11:10:48 +00:00