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f85f37d4f7
- Add basic platform setup - Add mt8192 documentation at docs/plat/ - Add generic CPU helper functions - Add basic register address Change-Id: Ife34622105404a8227441aab939e3c55c96374e9 Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>
49 lines
1.4 KiB
ArmAsm
49 lines
1.4 KiB
ArmAsm
/*
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* Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <platform_def.h>
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.globl plat_is_my_cpu_primary
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.globl plat_my_core_pos
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.globl plat_mediatek_calc_core_pos
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func plat_is_my_cpu_primary
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mrs x0, mpidr_el1
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and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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cmp x0, #PLAT_PRIMARY_CPU
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cset x0, eq
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ret
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endfunc plat_is_my_cpu_primary
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/* -----------------------------------------------------
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* unsigned int plat_my_core_pos(void)
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* This function uses the plat_mediatek_calc_core_pos()
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* definition to get the index of the calling CPU.
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* -----------------------------------------------------
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*/
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func plat_my_core_pos
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mrs x0, mpidr_el1
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b plat_mediatek_calc_core_pos
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endfunc plat_my_core_pos
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/* -----------------------------------------------------
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* unsigned int plat_mediatek_calc_core_pos(u_register_t mpidr);
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*
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* In ARMv8.2, AFF2 is cluster id, AFF1 is core id and
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* AFF0 is thread id. There is only one cluster in ARMv8.2
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* and one thread in current implementation.
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*
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* With this function: CorePos = CoreID (AFF1)
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* we do it with x0 = (x0 >> 8) & 0xff
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* -----------------------------------------------------
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*/
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func plat_mediatek_calc_core_pos
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mov x1, #MPIDR_AFFLVL_MASK
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and x0, x1, x0, lsr #MPIDR_AFF1_SHIFT
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ret
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endfunc plat_mediatek_calc_core_pos
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