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f8578e641b
Some platforms are extremely memory constrained and must split BL31
between multiple non-contiguous areas in SRAM. Allow the NOBITS
sections (.bss, stacks, page tables, and coherent memory) to be placed
in a separate region of RAM from the loaded firmware image.
Because the NOBITS region may be at a lower address than the rest of
BL31, __RW_{START,END}__ and __BL31_{START,END}__ cannot include this
region, or el3_entrypoint_common would attempt to invalidate the dcache
for the entire address space. New symbols __NOBITS_{START,END}__ are
added when SEPARATE_NOBITS_REGION is enabled, and the dcached for the
NOBITS region is invalidated separately.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Idedfec5e4dbee77e94f2fdd356e6ae6f4dc79d37
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| .. | ||
| alt-boot-flows.rst | ||
| auth-framework.rst | ||
| cpu-specific-build-macros.rst | ||
| firmware-design.rst | ||
| index.rst | ||
| interrupt-framework-design.rst | ||
| psci-pd-tree.rst | ||
| reset-design.rst | ||
| trusted-board-boot-build.rst | ||
| trusted-board-boot.rst | ||