mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-27 07:15:20 +00:00
0dae56bb2f
This commit deletes the value of the redefined CPG register. Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I05cf4a449ae28adb2ddd59593971a7d0cbcb21de
38 lines
855 B
C
38 lines
855 B
C
/*
|
|
* Copyright (c) 2018-2021, Renesas Electronics Corporation. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#include <lib/mmio.h>
|
|
|
|
#include "cpg_registers.h"
|
|
#include "rcar_private.h"
|
|
|
|
#if IMAGE_BL31
|
|
void __attribute__ ((section(".system_ram"))) cpg_write(uintptr_t regadr, uint32_t regval)
|
|
#else
|
|
void cpg_write(uintptr_t regadr, uint32_t regval)
|
|
#endif
|
|
{
|
|
uint32_t value = regval;
|
|
|
|
mmio_write_32(CPG_CPGWPR, ~value);
|
|
mmio_write_32(regadr, value);
|
|
}
|
|
|
|
#if IMAGE_BL31
|
|
void __attribute__ ((section(".system_ram"))) mstpcr_write(uint32_t mstpcr, uint32_t mstpsr,
|
|
uint32_t target_bit)
|
|
#else
|
|
void mstpcr_write(uint32_t mstpcr, uint32_t mstpsr, uint32_t target_bit)
|
|
#endif
|
|
{
|
|
uint32_t reg;
|
|
|
|
reg = mmio_read_32(mstpcr);
|
|
reg &= ~target_bit;
|
|
cpg_write(mstpcr, reg);
|
|
while ((mmio_read_32(mstpsr) & target_bit) != 0U) {
|
|
}
|
|
}
|