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f62ad32269
Invalidate the Branch Target Buffer (BTB) on entry to EL3 by disabling and enabling the MMU. To achieve this without performing any branch instruction, a per-cpu vbar is installed which executes the workaround and then branches off to the corresponding vector entry in the main vector table. A side effect of this change is that the main vbar is configured before any reset handling. This is to allow the per-cpu reset function to override the vbar setting. This workaround is enabled by default on the affected CPUs. Change-Id: I97788d38463a5840a410e3cea85ed297a1678265 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com> |
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| .. | ||
| diagrams | ||
| plantuml | ||
| plat | ||
| spd | ||
| arm-sip-service.rst | ||
| auth-framework.rst | ||
| change-log.rst | ||
| cpu-specific-build-macros.rst | ||
| firmware-design.rst | ||
| firmware-update.rst | ||
| interrupt-framework-design.rst | ||
| platform-interrupt-controller-API.rst | ||
| platform-migration-guide.rst | ||
| porting-guide.rst | ||
| psci-lib-integration-guide.rst | ||
| psci-pd-tree.rst | ||
| reset-design.rst | ||
| rt-svc-writers-guide.rst | ||
| sdei.rst | ||
| secure-partition-manager-design.rst | ||
| trusted-board-boot.rst | ||
| user-guide.rst | ||
| xlat-tables-lib-v2-design.rst | ||