Jayanth Dodderi Chidanand f4303d05ea feat(cm): handle asymmetry for FEAT_TCR2 ... With introduction of FEAT_STATE_CHECK_ASYMMETRIC, the asymmetry of cores can be handled. FEAT_TCR2 is one of the features which can be asymmetric across cores and the respective support is added here. Adding a function to handle this asymmetry by re-visting the feature presence on running core. There are two possible cases: - If the primary core has the feature and secondary does not have it then the feature is disabled. - If the primary does not have the feature and secondary has it then, the feature need to be enabled in secondary cores. Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: I73a70891d52268ddfa4effe40edf04115f5821ca		2024-09-05 16:28:23 +01:00
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aarch32	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
aarch64	feat(cm): handle asymmetry for FEAT_TCR2	2024-09-05 16:28:23 +01:00
cpu_data_array.c	chore: update to use Arm word across TF-A	2023-08-08 15:12:30 +01:00
simd_ctx.c	feat(simd): introduce simd context helper APIs	2024-08-19 11:10:10 -05:00