Jayanth Dodderi Chidanand f4303d05ea feat(cm): handle asymmetry for FEAT_TCR2 ... With introduction of FEAT_STATE_CHECK_ASYMMETRIC, the asymmetry of cores can be handled. FEAT_TCR2 is one of the features which can be asymmetric across cores and the respective support is added here. Adding a function to handle this asymmetry by re-visting the feature presence on running core. There are two possible cases: - If the primary core has the feature and secondary does not have it then the feature is disabled. - If the primary does not have the feature and secondary has it then, the feature need to be enabled in secondary cores. Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: I73a70891d52268ddfa4effe40edf04115f5821ca		2024-09-05 16:28:23 +01:00
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aarch64	refactor(cpus): replace adr with adr_l	2024-05-03 14:08:13 +02:00
bl31.ld.S	feat(build): check that .text section starts at page boundary	2023-11-06 23:22:25 +03:00
bl31.mk	feat(cm): handle asymmetry for FEAT_TCR2	2024-09-05 16:28:23 +01:00
bl31_context_mgmt.c	feat(rme): add context management changes for FEAT_RME	2021-10-05 18:41:35 +02:00
bl31_main.c	Merge changes from topic "early_console" into integration	2024-05-08 23:12:11 +02:00
bl31_traps.c	refactor(cpufeat): add macro to simplify is_feat_xx_present	2024-05-02 12:16:16 -05:00
ehf.c	fix(gic600): workaround for Part 1 of GIC600 erratum 2384374	2024-03-06 14:16:35 -06:00
interrupt_mgmt.c	fix(misra): fix MISRA defects	2024-03-07 09:38:27 -06:00